Patents by Inventor Federico A. Altolaguirre

Federico A. Altolaguirre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ESD protection circuit
    Patent number: 8498085
    Abstract: An ESD protection circuit with leakage current reduction function includes a silicon controlled rectifier, a first CMOS inverter, a first transistor, a current mirror, a PMOS capacitor and a resistor. The first CMOS inverter electrically connects with the silicon controlled rectifier. The first transistor comprises a first end, a second end and a third end, wherein the first end electrically connects with the silicon controlled rectifier and the first CMOS inverter, and the current mirror electrically connects with the third end of the first transistor. The PMOS capacitor electrically connects with the current mirror, and the resistor electrically connects with the first CMOS inverter, the second end of the first transistor and the PMOS capacitor.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: July 30, 2013
    Assignee: National Sun Yat-Sen University
    Inventors: Federico A. Altolaguirre, Ming-Dou Ker, Chua-Chin Wang
  • ESD PROTECTION CIRCUIT
    Publication number: 20130057992
    Abstract: An ESD protection circuit with leakage current reduction function includes a silicon controlled rectifier, a first CMOS inverter, a first transistor, a current mirror, a PMOS capacitor and a resistor. The first CMOS inverter electrically connects with the silicon controlled rectifier. The first transistor comprises a first end, a second end and a third end, wherein the first end electrically connects with the silicon controlled rectifier and the first CMOS inverter, and the current mirror electrically connects with the third end of the first transistor. The PMOS capacitor electrically connects with the current mirror, and the resistor electrically connects with the first CMOS inverter, the second end of the first transistor and the PMOS capacitor.
    Type: Application
    Filed: August 20, 2012
    Publication date: March 7, 2013
    Applicant: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Federico A. Altolaguirre, Ming-Dou Ker, Chua-Chin Wang