Patents by Inventor Federico Nicolas Paredes

Federico Nicolas Paredes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763972
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 1, 2020
    Assignee: INPHI CORPORATION
    Inventors: Mario Rafael Hueda, Mauro Marcelo Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam
  • Patent number: 10742327
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: August 11, 2020
    Assignee: INPHI CORPORATION
    Inventors: Oscar Ernesto Agazzi, Diego Ernesto Crivelli, Paul Voois, Ramiro Rogelio Lopez, Jorge Manuel Finochietto, Norman L. Swenson, Mario Rafael Hueda, Hugo Santiago Carrer, Vadim Gutnik, Adrián Ulises Morales, Martin Ignacio Del Barco, Martin Carlos Asinari, Federico Nicolas Paredes, Alfredo Javier Taddei, Mauro Marcelo Bruni, Damian Alfonso Morero, Facundo Abel Alcides Ramos, María Laura Ferster, Elvio Adrian Serrano, Pablo Gustavo Quiroga, Roman Antonio Arenas, Matias German Schnidrig, Alejandro Javier Schwoykoski
  • Publication number: 20200092011
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 19, 2020
    Inventors: Mario Rafael HUEDA, Mauro Marcelo BRUNI, Federico Nicolas PAREDES, Hugo Santiago CARRER, Diego Ernesto CRIVELLI, Oscar Ernesto AGAZZI, Norman L. SWENSON, Seyedmohammadreza MOTAGHIANNEZAM
  • Publication number: 20200044744
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Application
    Filed: October 11, 2019
    Publication date: February 6, 2020
    Inventors: Oscar Ernesto AGAZZI, Diego Ernesto CRIVELLI, Paul VOOIS, Ramiro Rogelio LOPEZ, Jorge Manuel FINOCHIETTO, Norman L. SWENSON, Mario Rafael HUEDA, Hugo Santiago CARRER, Vadim GUTNIK, Adrián Ulises MORALES, Martin Ignacio DEL BARCO, Martin Carlos ASINARI, Federico Nicolas PAREDES, Alfredo Javier TADDEI, Mauro Marcelo BRUNI, Damian Alfonso MORERO, Facundo Abel Alcides RAMOS, María Laura FERSTER, Elvio Adrian SERRANO, Pablo Gustavo QUIROGA, Roman Antonio ARENAS, Matias German SCHNIDRIG, Alejandro Javier SCHWOYKOSKI
  • Patent number: 10530493
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: January 7, 2020
    Assignee: INPHI CORPORATION
    Inventors: Mario Rafael Hueda, Mauro Marcelo Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam
  • Patent number: 10491304
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: November 26, 2019
    Assignee: INPHI CORPORATION
    Inventors: Oscar Ernesto Agazzi, Diego Ernesto Crivelli, Paul Voois, Ramiro Rogelio Lopez, Jorge Manuel Finochietto, Norman L. Swenson, Mario Rafael Hueda, Hugo Santiago Carrer, Vadim Gutnik, Adrián Ulises Morales, Martin Ignacio Del Barco, Martin Carlos Asinari, Federico Nicolas Paredes, Alfredo Javier Taddei, Mauro Marcelo Bruni, Damian Alfonso Morero, Facundo Abel Alcides Ramos, Maria Laura Ferster, Elvio Adrian Serrano, Pablo Gustavo Quiroga, Roman Antonio Arenas, Matias German Schnidrig, Alejandro Javier Schwoykoski
  • Publication number: 20190115984
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Mario Rafael HUEDA, Mauro Marcelo BRUNI, Federico Nicolas PAREDES, Hugo Santiago CARRER, Diego Ernesto CRIVELLI, Oscar Ernesto AGAZZI, Norman L. SWENSON, Seyedmohammadreza MOTAGHIANNEZAM
  • Publication number: 20190109646
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Application
    Filed: November 29, 2018
    Publication date: April 11, 2019
    Inventors: Oscar Ernesto AGAZZI, Diego Ernesto CRIVELLI, Paul VOOIS, Ramiro Rogelio LOPEZ, Jorge Manuel FINOCHIETTO, Norman L. SWENSON, Mario Rafael HUEDA, Hugo Santiago CARRER, Vadim GUTNIK, Adrián Ulises MORALES, Martin Ignacio DEL BARCO, Martin Carlos ASINARI, Federico Nicolas PAREDES, Alfredo Javier TADDEI, Mauro Marcelo BRUNI, Damian Alfonso MORERO, Facundo Abel Alcides RAMOS, María Laura FERSTER, Elvio Adrian SERRANO, Pablo Gustavo QUIROGA, Roman Antonio ARENAS, Matias German SCHNIDRIG, Alejandro Javier SCHWOYKOSKI
  • Patent number: 10181908
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: January 15, 2019
    Assignee: INPHI CORPORATION
    Inventors: Mario Rafael Hueda, Mauro Marcelo Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam
  • Patent number: 10177851
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: January 8, 2019
    Assignee: INPHI CORPORATION
    Inventors: Oscar Ernesto Agazzi, Diego Ernesto Crivelli, Paul Voois, Ramiro Rogelio Lopez, Jorge Manuel Finochietto, Norman L. Swenson, Mario Rafael Hueda, Hugo Santiago Carrer, Vadim Gutnik, Adrián Ulises Morales, Martin Ignacio Del Barco, Martin Carlos Asinari, Federico Nicolas Paredes, Alfredo Javier Taddei, Mauro Marcelo Bruni, Damian Alfonso Morero, Facundo Abel Alcides Ramos, María Laura Ferster, Elvio Adrian Serrano, Pablo Gustavo Quiroga, Roman Antonio Arenas, Matias German Schnidrig, Alejandro Javier Schwoykoski
  • Publication number: 20180115369
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Application
    Filed: December 12, 2017
    Publication date: April 26, 2018
    Inventors: Mario Rafael HUEDA, Mauro Marcelo BRUNI, Federico Nicolas PAREDES, Hugo Santiago CARRER, Diego Ernesto CRIVELLI, Oscar Ernesto AGAZZI, Norman L. SWENSON, Seyedmohammadreza MOTAGHIANNEZAM
  • Patent number: 9876583
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: January 23, 2018
    Assignee: INPHI CORPORATION
    Inventors: Mario Rafael Hueda, Mauro M. Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam
  • Publication number: 20170317759
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Application
    Filed: July 12, 2017
    Publication date: November 2, 2017
    Inventors: Oscar Ernesto AGAZZI, Diego Ernesto CRIVELLI, Paul VOOIS, Ramiro Rogelio LOPEZ, Jorge Manuel FINOCHIETTO, Norman L. SWENSON, Mario Rafael HUEDA, Hugo Santiago CARRER, Vadim GUTNIK, Adrián Ulises MORALES, Martin Ignacio DEL BARCO, Martin Carlos ASINARI, Federico Nicolas PAREDES, Alfredo Javier TADDEI, Mauro Marcelo BRUNI, Damian Alfonso MORERO, Facundo Abel Alcides RAMOS, María Laura FERSTER, Elvio Adrian SERRANO, Pablo Gustavo QUIROGA, Roman Antonio ARENAS, Matias German SCHNIDRIG, Alejandro Javier SCHWOYKOSKI
  • Publication number: 20170302385
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Application
    Filed: June 14, 2017
    Publication date: October 19, 2017
    Inventors: Mario Rafael HUEDA, Mauro M. BRUNI, Federico Nicolas PAREDES, Hugo Santiago CARRER, Diego Ernesto CRIVELLI, Oscar Ernesto AGAZZI, Norman L. SWENSON, Seyedmohammadreza MOTAGHIANNEZAM
  • Patent number: 9735881
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal at the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: August 15, 2017
    Assignee: INPHI CORPORATION
    Inventors: Oscar Ernesto Agazzi, Diego Ernesto Crivelli, Paul Voois, Ramiro Rogelio Lopez, Jorge Manuel Finochietto, Norman L. Swenson, Mario Rafael Hueda, Hugo Santiago Carrer, Vadim Gutnik, Adrián Ulises Morales, Martin Ignacio del Barco, Martin Carlos Asinari, Federico Nicolas Paredes, Alfredo Javier Taddei, Mauro M. Bruni, Damian Alfonso Morero, Facundo Abel Alcides Ramos, María Laura Ferster, Elvio Adrian Serrano, Pablo Gustavo Quiroga, Roman Antonio Arenas, Matias German Schnidrig, Alejandro Javier Schwoykoski
  • Patent number: 9712253
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: July 18, 2017
    Assignee: INPHI CORPORATION
    Inventors: Mario Rafael Hueda, Mauro M. Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam
  • Patent number: 9337934
    Abstract: A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal at the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: May 10, 2016
    Assignee: ClariPhy Communications, Inc.
    Inventors: Oscar Ernesto Agazzi, Diego Ernesto Crivelli, Paul Voois, Ramiro Rogelio Lopez, Jorge Manuel Finochietto, Norman L. Swenson, Mario Rafael Hueda, Hugo Santiago Carrer, Vadim Gutnik, Ulises Morales, Martin Ignacio del Barco, Martin Carlos Asinari, Federico Nicolas Paredes, Alfredo Javier Taddei, Mauro M. Bruni, Damian Alfonso Morero, Facundo Abel Alcides Ramos, Laura Maria Ferster, Elvio Adrian Serrano, Pablo Gustavo Quiroga, Roman Antonio Arenas, Matias German Schnidrig, Alejandro Javier Schwoykoski
  • Patent number: 9178625
    Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: November 3, 2015
    Assignee: ClariPhy Communications Inc.
    Inventors: Mario Rafael Hueda, Mauro M. Bruni, Federico Nicolas Paredes, Hugo Santiago Carrer, Diego Ernesto Crivelli, Oscar Ernesto Agazzi, Norman L. Swenson, Seyedmohammadreza Motaghiannezam