Abstract: An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.