Patents by Inventor Federico Sambilay

Federico Sambilay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FPGA functionality mode switch-over
    Patent number: 10627798
    Abstract: In an embodiment of the invention, an apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; a field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA; wherein the apparatus triggers a switch of an FPGA image in the FPGA to another FPGA image. In another embodiment of the invention, a method comprises: triggering, by an apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image; herein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: April 21, 2020
    Assignee: BiTMICRO Networks, Inc.
    Inventors: Federico Sambilay, Jr., Bharadwaj Pudipeddi, Richard A. Cantong, Joevanni Parairo
  • Efficient Operand Multicast For Acceleration
    Publication number: 20190158384
    Abstract: In an embodiment of the invention, an apparatus comprises: a requestor configured to transmit a first operand and a second operand, wherein the first operand is partitioned; a shared network configured to transmit the operands; a processing load balancer for receiving the operands; a plurality of processing elements that are configured to process the operands; and a private network configured to multicast the operands to the processing elements. In another embodiment of the invention, a method comprises: transmitting a first operand and a second operand from a requestor, wherein the first operand is partitioned; transmitting the operands along a shared network; receiving the operands by a processing load balancer; multicasting the operands by a private network; and processing the operands by a plurality of processing elements.
    Type: Application
    Filed: June 25, 2018
    Publication date: May 23, 2019
    Inventors: Bharadwaj Pudipeddi, Federico Sambilay, Richard A. Cantong
  • FPGA Functionality Mode Switch-Over
    Publication number: 20190018386
    Abstract: In an embodiment of the invention, an apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; a field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA; wherein the apparatus triggers a switch of an FPGA image in the FPGA to another FPGA image. In another embodiment of the invention, a method comprises: triggering, by an apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image; herein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 17, 2019
    Inventors: Federico Sambilay Jr., Bharadwaj Pudipeddi, Richard A. Cantong, Joevanni Parairo