Patents by Inventor Fei She

Fei She has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240321771
    Abstract: A chip system includes a chip package body and an electromagnetic shielding enclosure. The chip package body is electrically connected to a circuit board through a first connection part. The chip package body includes a package substrate and at least one chip that are electrically connected. The electromagnetic shielding enclosure includes a conductive first shielding structure and a conductive second shielding structure. The first shielding structure is connected to the package substrate. A first cavity included in the first shielding structure is configured to accommodate at least one chip. A first end of the second shielding structure is connected to the circuit board or a solder pad of the circuit board; or a second end of the second shielding structure is connected to the first shielding structure to form a second cavity.
    Type: Application
    Filed: June 5, 2024
    Publication date: September 26, 2024
    Inventors: Bai DU, Zhongli JI, Fei SHE, Ruilin LI, Qingchao GUO
  • Patent number: 12002685
    Abstract: Disclosed is a method for packaging a chip, comprising the following steps: providing a baseplate formed with an open slot thereon penetrating through opposite sides of the baseplate; providing a release base material, wherein the release base material is bonded to a first side of the baseplate and covers the open slot; providing a chip, wherein the chip is mounted on the release base material at the position of the open slot; packaging a second side of the baseplate facing away from the release base material so as to form a packaging layer which packages the chip and fixes it on the baseplate; removing the release base material so as to obtain a package structure for the chip.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: June 4, 2024
    Assignee: Weifang Goertek Microelectronics Co., Ltd.
    Inventors: Baoguan Yin, Fei She, Dewen Tian, Qinglin Song
  • Publication number: 20220367209
    Abstract: Disclosed is a method for packaging a chip, comprising the following steps: providing a baseplate formed with an open slot thereon penetrating through opposite sides of the baseplate; providing a release base material, wherein the release base material is bonded to a first side of the baseplate and covers the open slot; providing a chip, wherein the chip is mounted on the release base material at the position of the open slot; packaging a second side of the baseplate facing away from the release base material so as to form a packaging layer which packages the chip and fixes it on the baseplate; removing the release base material so as to obtain a package structure for the chip.
    Type: Application
    Filed: December 6, 2019
    Publication date: November 17, 2022
    Applicant: Weifang Goertek Microelectronics Co., Ltd.
    Inventors: Baoguan Yin, Fei She, Dewen Tian, Qinglin Song