Abstract: A memory drive and associated method. The memory drive includes: a plurality of solid-state devices (SSDs); a plurality of dynamic random-access memory (DRAM) devices; and a controller configured to implement a data management process. The data management process includes: partitioning the DRAM devices into SSD-domain DRAM having a mapping table and a CXL-domain DRAM having a system memory space that is directly accessible by a host CPU; and processing read requests from the host CPU for data in the SSDs, including writing requested data into the system memory space of the CXL-domain DRAM, and then writing the requested data from the CXL-domain DRAM to the host CPU using a CXL transport protocol.

Abstract: A memory drive and associated method. The memory drive includes: a plurality of solid-state devices (SSDs); a plurality of dynamic random-access memory (DRAM) devices; and a controller configured to implement a data management process. The data management process includes: partitioning the DRAM devices into SSD-domain DRAM having a mapping table and a CXL-domain DRAM having a system memory space that is directly accessible by a host CPU; and processing read requests from the host CPU for data in the SSDs, including writing requested data into the system memory space of the CXL-domain DRAM, and then writing the requested data from the CXL-domain DRAM to the host CPU using a CXL transport protocol.

Abstract: The present invention discloses a SmartBac baculovirus expression system and application thereof. The system can comprise a acceptor plasmid (containing fragment A or fragments B and C) and a donor plasmid (containing fragment D); the fragment A contains a promoter, a sequence encoding a protease, a protease cleavage site, an insertion region of a gene encoding a target object to be expressed and a termination sequence; the fragment B contains a promoter, a sequence encoding a protease and a termination sequence; the fragment C contains a promoter, an insertion region of a gene encoding a target object to be expressed and a termination sequence; the fragment D contains a promoter, an insertion region of a gene encoding a target object to be expressed and a termination sequence.

Abstract: This application provides a handover control method, an admission control method, and a communication apparatus. A first access network device obtains mapping information between an access network slice instance of a second access network device and a network slice; the first access network device determines, based on the mapping information, that the second access network device supports a first network slice associated with a service currently performed by a terminal device; and the first access network device sends first request information to the second access network device, where the first request information is used to request to enable the terminal device to access the second access network device, and then the second access network device performs admission control. In this technical solution, continuity of a network slice service can be ensured when the terminal device performs handover between access network devices, and impact on a core network can be reduced.

Abstract: A communication system includes a first central unit CU, a first apparatus, and at least one distributed unit DU, where the first CU may be configured to manage the first apparatus and/or a part or all of the at least one DU; and the first apparatus may be configured to manage resource collaboration of the at least one DU.

Abstract: A self-managed DRAM module and method. A controller chip is configured to handle data access requests according to a process that includes: searching a first tier for an uncompressed cache data block; in response to a first tier hit, serving the uncompressed cache data block to service the data access request; in response to a first tier miss, searching a second tier for a compressed cache data block; in response to a second tier hit, decompressing the compressed cache data block to generate a decompressed cache data block, and inserting the decompressed cache data block into the first tier to service the data access request; and in response to a second tier miss, reading a compressed data block from DRAM, decompressing the compressed data block to generate a decompressed data block, and inserting the decompressed data block into the first tier to service the data access request.

Abstract: A heat spreader includes a first plate, a second plate and a plurality of protrusions. The first plate is configured to fit against at least one side surface of a cell. The second plate is hermetically connected to the first plate to form an enclosed space filled with a liquid medium. The protrusions are disposed between the first plate and the second plate and dispersedly arranged in the enclosed space. Some of the protrusions are arranged at intervals in a first direction to form a protrusion group, and two parts of the protrusions respectively belonging to two adjacent protrusion groups are at least partially staggered in a second direction different from the first direction.

Abstract: A computing task scheduling method and a communication apparatus are provided. The method includes receiving first information, where the first information is configured to indicate a requirement on a computing task of a first apparatus, and the computing task includes at least one subtask. Sending second information in response to the first information, where the second information is configured to indicate one or more subtasks in the at least one subtask scheduled to a first computing node.

Abstract: Disclosed are a tab welding structure and a battery. The tab welding structure includes a tab and a to-be-welded part, where the to-be-welded part is welded on the tab to form a connecting portion, a plurality of first welding mark structures that are concave in a thickness direction of the connecting portion are formed on the connecting portion, each of the plurality of first welding mark structures includes a first welding surface and a first surrounding wall that are connected to each other, and the first surrounding wall is an arc surface.

Abstract: The present disclosure provides a cover plate assembly and a battery. The cover plate assembly is mounted on a shell with an accommodation cavity, and includes: a cover plate, provided with a first mounting hole in communication with the accommodation cavity; a collection component, located in the accommodation cavity and configured to acquire parameter information inside the shell; a lower connection part, of which a first end is located in the first mounting hole and a second end is communicatively connected with the collection component; and, an upper connection part, of which a first end is detachably communicatively connected with the first end of the lower connection part and a second end passes through the first mounting hole.

Abstract: A self-managed DRAM module and method. The module includes a plurality of DRAM chips; and a controller chip configured to compress a data chunk received from a host according to a process that includes: compressing the data chunk to generate a plurality of compression results, wherein each compression result includes a different block size; identifying an optimal compression result, wherein the optimal compression result has a lowest block size among the plurality of compression results that achieves a threshold compression; and storing the optimal compression result in the plurality of DRAM chips.

Abstract: A self-managed DRAM module and method. The module includes a plurality of DRAM chips; and a controller chip configured to store a data block received from a host according to a process that includes: compressing the data block to generate a compressed data block; performing error detection code (EDC) encoding on the compressed block and adding an EDC redundancy to the compressed block; partitioning the compressed block with the EDC redundancy into a set of m data chunks; performing error correction code (ECC) encoding on each of the m data chunks to generate m codewords; and writing the m codewords to the DRAM chips.

Abstract: A multimode solid-state drive (SSD) and associated method. An SSD includes: a plurality of flash memory chips addressable via a physical block address (PBA); and a controller chip configured to map logical block addresses (LBAs) from a host to PBAs, wherein the controller chip is further configured to handle different LBA block sizes according to a process that includes: partitioning a base partition to store one a long code word of size Clong having a single base data block protected with error correction coding (ECC); and partitioning a set of non-base partitions, each partitioned for a plurality of shortened code words, wherein each shortened code word is configured to store a shortened data block protected with ECC, and wherein the plurality of shortened code words are configured to be protected with ECC as a combined long codeword of size Clong.

Abstract: A cover plate assembly, a battery cell, and a battery are provided, relating to the technical field of batteries. The cover plate assembly includes a cover plate, a lower plastic member, an electrode post, and a tab insulating film. The lower plastic member is connected to the cover plate and is provided with an electrode post clearance hole. The electrode post is fixed to the cover plate and extends through the electrode post clearance hole. The electrode post is provided with a tab connection groove. The tab insulating film is disposed on a side of the lower plastic member facing away from the cover plate and is configured to insulate and isolate a tab of the battery cell from a housing of the battery cell.

Abstract: This application provides a communication method. In an example of the method, a terminal device accessing a first relay node sends first information to a core network device, to request, from the core network device, a service corresponding to a first network slice. A second donor node sends second information to the core network device, to indicate to the core network device that the first relay node supports the first network slice, where the first network slice is not supported by a second TA, and a tracking area in which the terminal device is located is the second TA when a donor node of the first relay node is the second donor node.

Abstract: This application provides a battery and a battery module. The battery module includes a plurality of batteries and a structural adhesive. Each battery includes a battery cell and an insulating layer. The insulating layer is arranged on a side of the battery cell. One or more openings are formed in the insulating layer. The insulating layer in the one or more openings is less in thickness than other parts of the insulating layer. The structural adhesive is arranged on a surface of the battery cell, and is located in at least one of the one or more openings, and the battery and a component adjacent to battery are connected by the structural adhesive.

Abstract: This application provides a communication method. In an example, a first donor node receives LAB authorization information, where the IAB authorization information indicates an authorization status of a first LAB node, the first LAB node includes a first distributed unit and a first mobile termination, the first mobile termination has an RRC connection to a second donor node, the first distributed unit has an F1 connection to or attempts to establish an F1 connection to the first donor node, and the first donor node and the second donor node are different donor nodes; and the first donor node determines, based on the IAB authorization information, whether the first IAB node is allowed to serve UE.

Abstract: This disclosure provides a computation unit, a related apparatus, and a method. The computation unit includes: a weight buffer adapted to store a row vector fetched from an M×K? sparsified weight matrix, where M and K are respectively a number of rows and a number of columns of the weight matrix before being sparsified, and ? is a sparsity coefficient; an excitation buffer adapted to store a K×N excitation matrix; an index selector adapted to store a selection index corresponding to the row vector, and select a row of the excitation matrix based on the selection index, to obtain a K?×N selected excitation matrix; and a dot product computation unit adapted to multiply the row vector by the selected excitation matrix. This disclosure implements a manner of running a DNN on hardware. In such a manner, structured sparsity of a DNN can be fully utilized, so that inference efficiency is improved; moreover, a register file occupies relatively small bandwidth, and a timing constraint is weak.

Abstract: A dynamic position recognition and prompt method and system. The system comprises: a recognition module (1), a judgment module (2) and a prompt module (3); wherein the recognition module (1) is used to obtain a current scene image via an image obtaining device and recognize a current position of a specific object in the current scene image; the judgment module (2) is used to judge whether the current position of the specific object is within a preset recognition range; the prompt module (3) is used to performing navigation for the specific object if the current position of the specific object is not within the preset recognition range of the image obtaining device, to help a user in finding the specific object to be in the predetermined recognition range, so that the image and the navigation are more accurate and precise.

Abstract: A computing service implementation method and an apparatus. The method includes: a first radio access network (RAN) device obtains computing capability information of a first communication device; the first RAN device sends a first request to the first communication device, where the first request is for requesting the first communication device to perform a computing service of the first RAN device; the first RAN device receives a first response from the first communication device, where the first response indicates the computing service that is of the first RAN device and that is admitted by the first communication device; and the first RAN device exchanges, with the first communication device, data of the computing service that is of the first RAN device and that is admitted by the first communication device.