Abstract: A plurality of pieces of to-be-processed data are obtained, and a plurality of groups corresponding to the plurality of pieces of to-be-processed data are further obtained. Watermarks are added to to-be-processed data in the target group by using the target group as a granularity. Because watermarks are added to the plurality of pieces of to-be-processed data by using the group as the granularity, although the to-be-processed data in the group is modified due to watermark adding, the to-be-processed data changes within a range of a small amount of to-be-processed data included in the target group, and does not change within a range of the to-be-processed data, thereby alleviating a problem that the data is severely distorted after watermark adding. When to-be-processed data with similar semantics is placed in a same group, semantics of the to-be-processed data in the target group has a relatively small change after watermark adding.

Abstract: Provided is a system for detecting an anomaly in a multivariate time series that includes at least one processor programmed or configured to receive a dataset of a plurality of data instances, wherein each data instance comprises a time series of data points, determine a set of target data instances based on the dataset, determine a set of historical data instances based on the dataset, generate, based on the set of target data instances, a true value matrix, a true frequency matrix, and a true correlation matrix, generate a forecast value matrix, a forecast frequency matrix, and a forecast correlation matrix based on the set of target data instances and the set of historical data instances, determine an amount of forecasting error, and determine whether the amount of forecasting error corresponds to an anomalous event associated with the dataset of data instances. Methods and computer program products are also provided.

Abstract: A method for compensating display of a spliced screen, including: obtaining a picture to be displayed; obtaining a theoretical brightness gain of at least one sub-display region in a plurality of sub-display regions; obtaining an actual brightness gain of the central region according to the theoretical brightness gain of at least part of the sub-display regions, and obtaining actual brightness gains of a plurality of first nodes in the non-central region according to the theoretical brightness gain of at least part of the sub-display regions; obtaining an actual brightness gain of at least part of the non-central region by using a bilinear interpolation method according to the actual brightness gains of the plurality of first nodes and an actual brightness gain of at least one second node on the central region; and compensating the picture to be displayed based on an actual brightness gain of the picture to be displayed.

Abstract: A process for smelting high-speed steel by using an intermediate frequency furnace-LF furnace-VD includes: firstly, melting a steel material in an intermediate frequency furnace, smelting until the steel material is melted, adjusting chemical components, and then performing deoxidation and slagging; performing electric heating for steel tapping, sending the steel tapping into an LF furnace for smelting, heating to 1470-1510° C., and adjusting the chemical components; and finally, sending these components into a VD furnace for vacuum treatment, and performing steel tapping after the components are qualified. A slagging process in the intermediate frequency furnace is used, then the coarse adjustment of chemical components, the primary deoxidation, and the slagging are performed in the intermediate frequency furnace. After the molten steel is sent to the LF furnace, the slag adjustment can be performed. A content of oxygen in the molten steel can be controlled within 10 ppm after the VD vacuum treatment.

Abstract: A method of retrieving a query, an electronic device, and a medium are provided, which relate to fields of intelligent searching, intelligent recommendation, natural language processing, etc. The method of retrieving a query includes: processing a query to be retrieved, so as to obtain a first processing result for the query to be retrieved, the first processing result containing a first text information and a first semantic information; comparing the first processing result with a second processing result of each of at least one candidate query, so as to obtain a comparison result, the second processing result containing a second text information and a second semantic information; determining a target query from the at least one candidate query based on the comparison result; and determining at least one of the target query or an answer corresponding to the target query as a retrieving result.

Abstract: A dual-mode combined control method for a multi-inverter system based on a double split transformer is provided. For an extremely-weak grid, the method provides the dual-mode combined control method for a multi-inverter system based on a double split transformer. According to the method, the equivalent grid impedance at a point of common coupling (PCC) of one grid-connected inverter (GCI) in the multi-inverter system based on the double split transformer is obtained with a grid impedance identification algorithm, and the system sequentially operates in a full current source mode, a hybrid mode, and a full voltage source mode according to a gradually increasing equivalent grid impedance, thereby effectively improving the stability of the multi-inverter system based on the double split transformer during variation of the strength of the grid. The method ensures that the system can still operate stably in the extremely-weak grid.

Abstract: This application provides a power semiconductor device, which includes: a semiconductor substrate, where the semiconductor substrate is doped with a first-type impurity; an epitaxial layer, that is doped with the first-type impurity, the epitaxial layer is disposed on a surface of the semiconductor substrate, a first doped region doped with a second-type impurity is disposed on a first surface that is of the epitaxial layer and that is away from the semiconductor substrate, and a circumferential edge of the first surface of the epitaxial layer has a scribing region; a first metal layer, disposed on one side that is of the epitaxial layer and that is away from the semiconductor substrate, where the first metal layer is electrically connected to the epitaxial layer; a second metal layer, disposed on one side that is of the epitaxial layer and that is away from the semiconductor substrate; and a passivation layer.

Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to a process to facilitate abnormal document self-discovery. A system can comprise a memory that stores computer executable components, and a processor that executes the computer executable components stored in the memory, wherein the computer executable components can comprise an object detection component that can generate a knowledge graph with vectors corresponding with nodes representative of a page layout of a document. Additionally, the computer executable components can comprise an evaluation component that can compare the vectors to identify whether an edge is present between corresponding vectors of the knowledge graph; an encoder component that can re-code the knowledge graph; and a comparison component that can compare a structure of the knowledge graph with one or more other knowledge graphs corresponding to one or more other documents to determine if the document is abnormal.

Abstract: An automatic analyzing apparatus according to an embodiment of the present disclosure includes a reagent storage, a reaction vessel, a placement part, and a wiring fixing part. On the placement part, at least one of the reagent storage and the reaction vessel is placed. The wiring fixing part is attached to the bottom face side of the placement part, while a wiring connected to at least one of the reagent storage and the reaction vessel is fixed to the bottom face side of the wiring fixing part. It is possible to pull out the wiring fixing part.

Abstract: A method for generating a layout of a Josephson junction array includes obtaining an original script, in which geometric and action parameters are defined in the original script, the geometric parameters comprise a first structural parameter and a second structural parameter, the action parameters comprise an initial position parameter and a connection parameter; obtaining a first parameter value, a second parameter value, an initial position value, and a connection parameter value; in the original script, respectively assigning the first parameter value, the second parameter value, the initial position value, and the connection parameter value to the first structural parameter, the second structural parameter, the initial position parameter, and the connection parameter, so as to obtain a target script; and performing the target script to obtain a layout of a Josephson junction array having multiple connected Josephson junctions.

Abstract: Provided are various embodiments of a fastening assembly and wearable mount as well as methods, devices, components, and assemblies associated therewith. An example fastening assembly includes a trigger assembly having an actuator configured to be operated by a user and a housing comprising a housing connection portion. The housing may receive the actuator. The fastening assembly may further include a connector configured to engage the housing connection portion.

Abstract: A system-on-chip in accordance with an aspect of the present application comprises: a communication interface connected with an external bus; a hardware decoder connected with the communication interface; and a microprocessor core connected with the communication interface and the hardware decoder, wherein the hardware decoder is configured to receive, via the communication interface, a signal frame transmitted on the external bus, to extract a receiver address from the signal frame as received and to send a wake-up command to the microprocessor core upon determining that a receiver of the signal frame is the system-on-chip, wherein the microprocessor core is configured to remain in a sleep mode until the wake-up command is received, and to perform an operation specified by a control command contained in the signal frame in response to the wake-up command.

Abstract: A backlight control circuit for a surface light emitting device is provided. The backlight control circuit includes a driving circuit. The driving circuit is configured to generate a plurality of driving currents to drive the surface light emitting device such that a plurality of backlight blocks of the surface light emitting device generate a plurality of brightness values. The surface light emitting device is divided into a first backlight area and a second backlight area. The second backlight area is closer to an edge of the surface light emitting device than the first backlight area. A first driving current of the plurality of driving currents is utilized for driving the light source of the first backlight area. A second driving current of the plurality of driving currents is utilized for driving the light source of the second backlight area. The second driving current is greater than the first driving current.

Abstract: A solid state drive (SSD) includes an NAND memory and an SSD controller. The SSD controller includes an interface coupled to a host machine, a nonvolatile memory controller coupled to the interface, and a processor coupled to the nonvolatile memory controller. The SSD controller is configured to: receive, via the interface, a write command from the host machine; process, by the nonvolatile memory controller, the write command; transmit, from the nonvolatile memory controller to the processor, a system message; process, by the processor according to Zoned Namespaces (ZNS) protocol, the system message; obtain, by the nonvolatile memory controller via the interface, host data for storage from the host machine; and write the host data to the NAND memory based on a result of processing the system message. Processing the system message by the processor and obtaining the host data by the nonvolatile memory controller are executed in parallel.

Abstract: An apparatus and method for preparing high-purity spherical magnesium and/or high-purity magnesium powder are provided. The apparatus includes a vertical furnace body, a heating zone, and a condensing zone, where a periphery of the condensing zone is provided with a first thermal insulation device and a second thermal insulation device sequentially from bottom to top, and each of the first thermal insulation device and the second thermal insulation device is removably arranged; the periphery of the condensing zone is further provided with a liquid cooling device; a gas inlet and a gas outlet are formed in the condensing zone; and an inner wall of the condensing zone is provided with an arrangement structure configured to arrange a collection device. A heating temperature of a material and condensation conditions in the condensing zone are controlled to make an evaporated magnesium vapor condensed on the collection device in the condensing zone.

Abstract: This application describes systems and methods for facilitating memory access on flash drives. An example method may start with receiving a read command on a flash memory from a host specifying a logic block address (LBA). The flash memory may include a plurality of blocks grouped into a plurality of super blocks, and each of the plurality of blocks may include a plurality of pages. The method may further include determining a zone identification and an LBA offset based on the LBA; determining a flash physical address (FPA) corresponding to the LBA by accessing a mapping table stored in a random access memory (RAM) according to the zone identification and the LBA offset (e.g., the mapping table includes a plurality of FPAs arranged in a plurality of zones corresponding to the plurality of super blocks); and determining a page number and a block identification corresponding to the FPA.

Abstract: A fibrous structure. The structure may include a plurality of continuous or semi-continuous knuckles extending from portions of the surface of the fibrous structure in a parallel path, wherein the plurality of knuckles may be separated by adjacent continuous or semi-continuous pillows. Each knuckle may comprise a plurality of discrete pillows, the plurality of discrete pillows may be arranged in a spaced configuration along the path of each knuckle; alternatively, each pillow may comprise a plurality of discrete knuckles, the plurality of discrete knuckles may be arranged in a spaced configuration along the path of each pillow.

Abstract: The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a broadband power amplifier. A broadband power amplifier may include an input network connected a long an input signal path, a driver stage, an interstage matching network stage, a power amplification stage, and a broadband matching output network. The broadband matching output network may include two coupled transmission lines and a compensation line connected between the two coupled transmission lines. Further, the broadband matching output network may include a capacitor connected with a secondary winding and a capacitor connected to each of the primary windings. The disclosed technology further includes transmission systems incorporating the broadband power amplifier.

Abstract: The present invention provides a crystal of a compound represented by formula I as a 3-hydroxy-5-pregnane-20-one derivative and a preparation method therefor. Specifically, the present invention provides novel crystal forms A-C of the compound represented by formula I and a preparation method therefor. The novel crystal forms of the compound represented by formula I of the present invention have excellent thermal stability and mechanical stability, the preparation process thereof is simple, and the novel crystal forms have an excellent industrial implementation potential.