Patents by Inventor Fei Wei

Fei Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250099609
    Abstract: Multifunctional cerium oxide-P7C3 (aminopropyl carbazole) chimeric nanocompositions and methods for using these nanocompositions for enhancing bone deposition are provided. For example, these nanocompositions can be used to combat radiation-induced bone tissue/cell damage, to treat any disorders that promote osteoporosis, and/or to treat bone trauma/injury.
    Type: Application
    Filed: September 22, 2024
    Publication date: March 27, 2025
    Applicant: University of Central Florida Research Foundation, Inc.
    Inventors: Melanie Coathup, Sudipta Seal, Fei Wei, Elayaraja Kolanthai
  • Patent number: 12229864
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: February 18, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Eric Demers, Andrew Evan Gruber, Chun Yu, Baoguang Yang, Chihong Zhang, Yuehai Du, Avinash Seetharamaiah, Jonnala Gadda Nagendra Kumar, Gang Zhong, Zilin Ying, Fei Wei
  • Patent number: 12229215
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Grant
    Filed: October 16, 2023
    Date of Patent: February 18, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Gang Zhong, Fei Wei, Yibin Zhang, Jing Han, Hongjiang Shang, Elina Kamenetskaya, Minjie Huang, Alexei Vladimirovich Bourd, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Patent number: 12045928
    Abstract: Systems and techniques are provided for enhancing operations of a ray tracing processor. For instance, a process can include obtaining one or more nodes of an acceleration data structure. Each node of the one or more nodes includes the same number of bytes. The node(s) can be stored in a cache associated with a ray tracing processor. Each of the stored node(s) are cache line-aligned with the cache associated with the ray tracing processor. A first stored node of the stored node(s) can be provided to the ray tracing processor and processed by the ray tracing processor during a first clock cycle of the ray tracing processor. A second stored node of the stored node(s) can be provided to the ray tracing processor and processed by the ray tracing processor during a second clock cycle of the ray tracing processor.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: July 23, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: David Kirk McAllister, Fei Wei, Alexei Vladimirovich Bourd
  • Publication number: 20240046543
    Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for runtime optimization of the shader execution flow. A graphics processor may obtain instruction execution data associated with a graphics workload, the instruction execution data including graphics data for a set of shader operations. The graphics processor may configure, at a first iteration, at least one predication value based on the instruction execution data including the graphics data for the set of shader operations. The graphics processor may adjust, at a second iteration, an execution flow of the graphics workload based on the configured at least one predication value, the execution flow of the graphics workload including the set of shader operations. The graphics processor may execute or refrain from executing, at the second iteration, each of the set of shader operations based on the adjusted execution flow of the graphics workload.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 8, 2024
    Inventors: Yun DU, Eric DEMERS, Andrew Evan GRUBER, Chun YU, Baoguang YANG, Chihong ZHANG, Yuehai DU, Avinash SEETHARAMAIAH, Jonnala Gadda NAGENDRA KUMAR, Gang ZHONG, Zilin YING, Fei WEI
  • Publication number: 20240037183
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 1, 2024
    Inventors: Yun DU, Gang ZHONG, Fei WEI, Yibin ZHANG, Jing HAN, Hongjiang SHANG, Elina KAMENETSKAYA, Minjie HUANG, Alexei Vladimirovich BOURD, Chun YU, Andrew Evan GRUBER, Eric DEMERS
  • Patent number: 11829439
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: November 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Gang Zhong, Fei Wei, Yibin Zhang, Jing Han, Hongjiang Shang, Elina Kamenetskaya, Minjie Huang, Alexei Vladimirovich Bourd, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Publication number: 20230322060
    Abstract: A sunroof structure of a vehicle includes at least one first mount for being mounted to a vehicle body of the vehicle, a window panel for being disposed to a hollow portion of the vehicle and having a main body and second and third mounts disposed on a bottom side of the main body, a transmission member including first and second rotational shafts rotatably disposed with the first and second mounts respectively and at least one crank connected with the first and second rotational shafts, and a link pivotally connected between the third mount and a pivot mount of the vehicle body. As a result, the window panel is drivenable to close or open the hollow portion. The sunroof structure greatly increases the open area of the hollow portion, and provides the side shielding function for the vehicle when the window panel is opened.
    Type: Application
    Filed: March 24, 2023
    Publication date: October 12, 2023
    Inventor: Fei WEI
  • Publication number: 20230252717
    Abstract: Systems and techniques are provided for enhancing operations of a ray tracing processor. For instance, a process can include obtaining one or more nodes of an acceleration data structure. Each node of the one or more nodes includes the same number of bytes. The node(s) can be stored in a cache associated with a ray tracing processor. Each of the stored node(s) are cache line-aligned with the cache associated with the ray tracing processor. A first stored node of the stored node(s) can be provided to the ray tracing processor and processed by the ray tracing processor during a first clock cycle of the ray tracing processor. A second stored node of the stored node(s) can be provided to the ray tracing processor and processed by the ray tracing processor during a second clock cycle of the ray tracing processor.
    Type: Application
    Filed: February 4, 2022
    Publication date: August 10, 2023
    Inventors: David Kirk MCALLISTER, Fei WEI, Alexei Vladimirovich BOURD
  • Patent number: 11613466
    Abstract: This disclosure relates to the technical field of carbon nanotubes, provides an ultra-long chiral carbon nanotube and a method for preparing the same. The ultra-long chiral carbon nanotube has a diameter of about 1.5 nm to 5.5 nm and has a length of about 100 mm to 650 mm, the ultra-long chiral carbon nanotube includes a double-walled carbon nanotube and a triple-walled carbon nanotube, and each layer of the ultra-long chiral carbon nanotube is semiconducting and has a helix angle greater than 10°.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: March 28, 2023
    Assignee: Tsinghua University
    Inventors: Zhenxing Zhu, Fei Wei, Jun Gao, Silei Sun
  • Patent number: 11332417
    Abstract: The present invention relates to a system and process for preparing aromatics from syngases, which has advantages of shortened flow process and reduced investment. The process comprises reforming the liquefied gas, separated dry gas with a water steam to produce carbon monoxide and hydrogen, which return, as raw materials, to the aromatization system, so that the problem of by-product utilization is solved, and the syngas unit consumption per ton of aromatic products is reduced. The problem of utilization of a dry gas as a by-product is also solved in the present invention from the perspective of recycling economy, which reduces the water consumption in the process, and conforms to the concept of green chemistry.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 17, 2022
    Assignees: HUADIAN COAL INDUSTRY GROUP CO., LTD., TSINGHUA UNIVERSITY
    Inventors: Yu Cui, Xiaofan Huang, Xiaoping Tang, Tong Wang, Weizhong Qian, Fei Wei, Changping Gao, Xiulin Wang, Zuoru Yin
  • Patent number: 11204765
    Abstract: A graphics processing unit (GPU) utilizes block general purpose registers (bGPRs) to load multiple waves of samples for an instruction group into a processing pipeline and receive processed samples from the pipeline. The GPU acquires a credit for the bGPR for execution of the instruction group for a first wave using a persistent GPR and the bGPR. The GPU refunds the credit upon loading the first wave into the pipeline. The GPU executes a subsequent wave for the instruction group to load samples to the pipeline when at least one credit is available and the pipeline is processing the first wave. The GPU stores an indication of each wave that has been loaded into the pipeline in a queue. The GPU returns samples for a next wave in the queue from the pipeline to the bGPR for further processing when the physical slot of the bGPR is available.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: December 21, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Fei Wei, Gang Zhong, Minjie Huang, Jian Jiang, Zilin Ying, Baoguang Yang, Yang Xia, Jing Han, Liangxiao Hu, Chihong Zhang, Chun Yu, Andrew Evan Gruber, Eric Demers
  • Patent number: 11132760
    Abstract: Methods, systems, and devices for graphic processing are described. The methods, systems, and devices may include or be associated with identifying a graphics instruction, determining that the graphics instruction is alias enabled for the device, partitioning an alias lookup table into one or more slots, allocating a slot of the alias lookup table based on the partitioning and determining that the graphics instruction is alias enabled, generating an alias instruction based on allocating the slot of the alias lookup table and determining that the graphics instruction is alias enabled, and processing the alias instruction.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: September 28, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Andrew Evan Gruber, Chihong Zhang, Gang Zhong, Jian Jiang, Fei Wei, Minjie Huang, Zilin Ying, Yang Xia, Jing Han, Chun Yu, Eric Demers
  • Patent number: 11094103
    Abstract: Example techniques are described for generating graphics content by obtaining texture operation instructions corresponding to a texture operation, in response to determining at least one of insufficient general purpose register space is available for the texture operation or insufficient wave slots are available for the texture operation, generating an indication that the texture operation corresponds to a deferred wave, executing the texture operation, sending, to a texture processor, initial texture sample instructions corresponding to the texture operation that was executed, and receiving texture mapped data corresponding to the initial texture sample instructions.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: August 17, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Yun Du, Andrew Evan Gruber, Chun Yu, Chihong Zhang, Hongjiang Shang, Zilin Ying, Fei Wei
  • Publication number: 20210200836
    Abstract: The present disclosure relates to methods and apparatus for compute processing. For example, disclosed techniques facilitate improving performance of matrix multiplication in streaming processor. Aspects of the present disclosure can execute, with a load control unit, a first load instruction to load a set of input data of an input matrix from a first memory to a second memory. Aspects of the present disclosure can also execute, with the load control unit, a second load instruction to load a set of weight data of a weight matrix from the first memory to the second memory. Additionally, aspects of the present disclosure can perform, with an ALU component, a matrix multiplication operation using the set of input data and the set of weight data to generate an output matrix. Further, aspects of the present disclosure can store the output matrix at a general purpose register accessible to the ALU component.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 1, 2021
    Inventors: Yun DU, Gang ZHONG, Fei WEI, Yibin ZHANG, Jing HAN, Hongjiang SHANG, Elina KAMENETSKAYA, Minjie HUANG, Alexei Vladimirovich BOURD, Chun YU, Andrew Evan GRUBER, Eric DEMERS
  • Publication number: 20210198109
    Abstract: This disclosure relates to the technical field of carbon nanotubes, provides an ultra-long chiral carbon nanotube and a method for preparing the same. The ultra-long chiral carbon nanotube has a diameter of about 1.5 nm to 5.5 nm and has a length of about 100 mm to 650 mm, the ultra-long chiral carbon nanotube includes a double-walled carbon nanotube and a triple-walled carbon nanotube, and each layer of the ultra-long chiral carbon nanotube is semiconducting and has a helix angle greater than 10°.
    Type: Application
    Filed: December 22, 2020
    Publication date: July 1, 2021
    Applicant: Tsinghua University
    Inventors: Zhenxing Zhu, Fei Wei, Jun Gao, Silei Sun
  • Publication number: 20210183005
    Abstract: Methods, systems, and devices for graphic processing are described. The methods, systems, and devices may include or be associated with identifying a graphics instruction, determining that the graphics instruction is alias enabled for the device, partitioning an alias lookup table into one or more slots, allocating a slot of the alias lookup table based on the partitioning and determining that the graphics instruction is alias enabled, generating an alias instruction based on allocating the slot of the alias lookup table and determining that the graphics instruction is alias enabled, and processing the alias instruction.
    Type: Application
    Filed: December 13, 2019
    Publication date: June 17, 2021
    Inventors: Yun Du, Andrew Evan Gruber, Chihong Zhang, Gang Zhong, Jian Jiang, Fei Wei, Minjie Huang, Zilin Ying, Yang Xia, Jing Han, Chun Yu, Eric Demers
  • Publication number: 20200312006
    Abstract: Example techniques are described for generating graphics content by obtaining texture operation instructions corresponding to a texture operation, in response to determining at least one of insufficient general purpose register space is available for the texture operation or insufficient wave slots are available for the texture operation, generating an indication that the texture operation corresponds to a deferred wave, executing the texture operation, sending, to a texture processor, initial texture sample instructions corresponding to the texture operation that was executed, and receiving texture mapped data corresponding to the initial texture sample instructions.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 1, 2020
    Inventors: Yun DU, Andrew Evan GRUBER, Chun YU, Chihong ZHANG, Hongjiang SHANG, Zilin YING, Fei WEI
  • Publication number: 20200157021
    Abstract: The present invention relates to a system and process for preparing aromatics from syngases, which has advantages of shortened flow process and reduced investment. The process comprises reforming the liquefied gas, separated dry gas with a water steam to produce carbon monoxide and hydrogen, which return, as raw materials, to the aromatization system, so that the problem of by-product utilization is solved, and the syngas unit consumption per ton of aromatic products is reduced. The problem of utilization of a dry gas as a by-product is also solved in the present invention from the perspective of recycling economy, which reduces the water consumption in the process, and conforms to the concept of green chemistry.
    Type: Application
    Filed: June 30, 2017
    Publication date: May 21, 2020
    Inventors: Yu CUI, Xiaofan HUANG, Xiaoping TANG, Tong WANG, Weizhong QIAN, Fei WEI, Changping GAO, Xiulin WANG, Zuoru YIN
  • Patent number: D970495
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: November 22, 2022
    Inventor: Yi Fei Wei