Patents by Inventor Fei Zhang

Fei Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040044778
    Abstract: A system is disclosed that allows an entity outside of a private network to initiate communication with an entity inside the private network. The entity inside of the private network maintains a persistent connection with an agent. In one embodiment, communications that are intended for the entity inside the private network are sent to the agent. The agent then forwards the communications to the entity inside the private via the persistent connection.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 4, 2004
    Inventors: Hasan S. Alkhatib, Yun Fei Zhang, Fouad A. Tobagi, Farid F. Elwailly
  • Publication number: 20030234687
    Abstract: A novel linearization apparatus for reducing power amplifier distortion does not require delay lines. The apparatus includes a power amplifier and an error generator. The signals provided by the error generator (error signal) and the power amplifier are combined to subtract out the distortion introduced by the power amplifier. The error generator includes two auxiliary amplifiers, wherein one of the auxiliary amplifiers is operated in it saturated region and the other is operated in its non-saturated region. The power amplifier and the two auxiliary amplifiers have the same distortion characteristics and receive the same input signal. The auxiliary amplifier operating in its saturated region introduces distortion and the auxiliary amplifier operating in its non-saturated region does not introduce distortion. The two signals provided by the auxiliary amplifiers are combined to produce an error signal having a distortion component that is an approximate replica of the power amplifier distortion.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Inventors: Guang Fei Zhang, Xing Wang, Fabio Concilio, Tjo San Jao
  • Patent number: 6284623
    Abstract: A method of fabricating semiconductor devices, such as conductors, fuses, capacitors, diodes, transistors, and the like, includes forming or obtaining a semiconductor wafer having a substrate material, an oxide layer, and a nitride layer. Mesas (the edges of which include active regions) are then formed by etching trenches (gaps) into the substrate material through the nitride and oxide layers. In accordance with one aspect of the present invention, the nitride layer is then pulled-back or retracted from the edges of the active regions thus exposing the corners of the active regions. The gaps and the edges of the active regions are then lined with a layer of oxide which rounds the corners of the active regions. The gaps are filled with another layer of oxide, and the semiconductor wafer is then planarized. Optionally, the edges of the active regions are then implanted with dopant.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: September 4, 2001
    Inventors: Peng-Fei Zhang, Richard A. Mann