Abstract: A semiconductor device comprises: a substrate; a semiconductor layer formed on the substrate; a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode formed on the semiconductor layer; and a source field plate formed on the semiconductor layer. The source field plate sequentially comprises: a start portion electrically connected to the source electrode; a first intermediate portion spaced apart from the semiconductor layer with air therebetween; a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the semiconductor layer; and an end portion spaced apart from the semiconductor layer with air therebetween.

Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the same, and relates to the field of semiconductor devices. The semiconductor device includes an active region, a test region and a passive region located outside the active region and the test region, wherein a standard device is formed in the active region, and a test device for testing performance parameters of the standard device is formed in the test region.

Abstract: The present disclosure provides a semiconductor device and a method for manufacturing the same. A semiconductor device according to a performing mode includes a substrate, a semiconductor layer located on one side of the substrate, a source and a drain located on one side of the semiconductor layer away from the substrate, and a gate located between the source and the drain, and an isolation structure disposed on one side of the semiconductor layer away from the substrate, one end of the isolation structure being disposed at a side close to the source, and the other end being disposed at a side close to the drain and in direct contact with the surface layer of the semiconductor device, the isolation structure covering the gate or a part of the gate, the isolation structure being an integrally formed structure and forming a chamber with the semiconductor layer.

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, and the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the same, and relates to the field of semiconductor devices. The semiconductor device includes an active region, a test region and a passive region located outside the active region and the test region, wherein a standard device is formed in the active region, and a test device for testing performance parameters of the standard device is formed in the test region.

Abstract: A semiconductor device comprises an active region and a passive region located outside the active region. The active region comprises a plurality of active region units. At least one pair of adjacent active region units do not completely overlap in a length direction of the semiconductor device.

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, and the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

Abstract: A semiconductor device comprises an active region and a passive region located outside the active region. The active region comprises a plurality of active region units. At least one pair of adjacent active region units do not completely overlap in a length direction of the semiconductor device.

Abstract: A semiconductor device comprises: a substrate; a semiconductor layer formed on the substrate; a source electrode, a drain electrode and a gate electrode between the source electrode and the drain electrode formed on the semiconductor layer; and a source field plate formed on the semiconductor layer. The source field plate sequentially comprises: a start portion electrically connected to the source electrode; a first intermediate portion spaced apart from the semiconductor layer with air therebetween; a second intermediate portion disposed between the gate electrode and the drain electrode in a horizontal direction, without air between the second intermediate portion and the semiconductor layer; and an end portion spaced apart from the semiconductor layer with air therebetween.