Patents by Inventor Feixiang XIANG

Feixiang XIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11764732
    Abstract: A high-speed high-linearity time-interleaved dynamic operational amplifier circuit includes a first current channel and a second current channel. The first current channel includes a first MOS transistor, a second MOS transistor and a third MOS transistor which are sequentially connected in series between a high level and a ground level. The first MOS transistor and the second MOS transistor have opposite conductivity types. A control end of the first MOS transistor is connected to a control end of the second MOS transistor. The second current channel includes a fourth MOS transistor, a fifth MOS transistor and a sixth MOS transistor which are sequentially connected in series between the high level and the ground level. The fourth MOS transistor and the fifth MOS transistor have opposite conductivity types. A control end of the fourth MOS transistor is connected to a control end of the fifth MOS transistor.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: September 19, 2023
    Assignee: CHENGDU SINO MICROELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Feixiang Xiang, Yuanjun Cen
  • Publication number: 20220131502
    Abstract: A high-speed high-linearity time-interleaved dynamic operational amplifier circuit includes a first current channel and a second current channel. The first current channel includes a first MOS transistor, a second MOS transistor and a third MOS transistor which are sequentially connected in series between a high level and a ground level. The first MOS transistor and the second MOS transistor have opposite conductivity types. A control end of the first MOS transistor is connected to a control end of the second MOS transistor. The second current channel includes a fourth MOS transistor, a fifth MOS transistor and a sixth MOS transistor which are sequentially connected in series between the high level and the ground level. The fourth MOS transistor and the fifth MOS transistor have opposite conductivity types. A control end of the fourth MOS transistor is connected to a control end of the fifth MOS transistor.
    Type: Application
    Filed: July 28, 2021
    Publication date: April 28, 2022
    Applicant: Chengdu Sino Microelectronics Technology Co.,Ltd.
    Inventors: Feixiang XIANG, Yuanjun CEN