Patents by Inventor FEIYUE MA
FEIYUE MA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11355391Abstract: The present disclosure generally relates to methods for processing of substrates, and more particularly relates to methods for forming a metal gapfill. In one implementation, the method includes forming a metal gapfill in an opening using a multi-step process. The multi-step process includes forming a first portion of the metal gapfill, performing a sputter process to form one or more layers on one or more side walls, and growing a second portion of the metal gapfill to fill the opening with the metal gapfill. The metal gapfill formed by the multi-step process is seamless, and the one or more layers formed on the one or more side walls seal any gaps or defects between the metal gapfill and the side walls. As a result, fluids utilized in subsequent processes do not diffuse through the metal gapfill.Type: GrantFiled: February 27, 2020Date of Patent: June 7, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Xi Cen, Feiyue Ma, Kai Wu, Yu Lei, Kazuya Daito, Yi Xu, Vikash Banthia, Mei Chang, He Ren, Raymond Hoiman Hung, Yakuan Yao, Avgerinos V. Gelatos, David T. Or, Jing Zhou, Guoqiang Jian, Chi-Chou Lin, Yiming Lai, Jia Ye, Jenn-Yue Wang
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Patent number: 10861676Abstract: Exemplary methods for etching a variety of metal-containing materials may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and a metal-containing material arranged within a plurality of recesses defined by the two vertical columns. The plurality of recesses may include a first recess and a second recess adjacent to the first recess. The metal-containing material arranged within the first recess and the metal-containing material arranged within the second recess may be connected by the metal-containing material lining a portion of sidewalls of the trench. The methods may further include oxidizing the metal-containing material with the oxygen-containing precursor. The methods may also include flowing a halide precursor into the semiconductor processing chamber.Type: GrantFiled: March 5, 2018Date of Patent: December 8, 2020Assignee: Applied Materials, Inc.Inventors: Zhenjiang Cui, Nitin Ingle, Feiyue Ma, Hanshen Zhang, Siliang Chang, Daniella Holm
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Patent number: 10854426Abstract: Exemplary methods for laterally etching tungsten may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and tungsten slabs arranged within a plurality of recesses defined by at least one of the two vertical columns. At least two of the tungsten slabs may be connected by tungsten lining a portion of sidewalls of the trench. The methods may further include oxidizing the tungsten connecting the at least two of the tungsten slabs with the oxygen-containing precursor. The methods may include flowing a halide precursor into the semiconductor processing chamber. The methods may also include laterally etching the oxidized tungsten from the sidewalls of the trench.Type: GrantFiled: January 8, 2018Date of Patent: December 1, 2020Assignee: Applied Materials, Inc.Inventors: Zhenjiang Cui, Nitin Ingle, Feiyue Ma, Hanshen Zhang, Siliang Chang, Daniella Holm
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Publication number: 20200303250Abstract: The present disclosure generally relates to methods for processing of substrates, and more particularly relates to methods for forming a metal gapfill. In one implementation, the method includes forming a metal gapfill in an opening using a multi-step process. The multi-step process includes forming a first portion of the metal gapfill, performing a sputter process to form one or more layers on one or more side walls, and growing a second portion of the metal gapfill to fill the opening with the metal gapfill. The metal gapfill formed by the multi-step process is seamless, and the one or more layers formed on the one or more side walls seal any gaps or defects between the metal gapfill and the side walls. As a result, fluids utilized in subsequent processes do not diffuse through the metal gapfill.Type: ApplicationFiled: February 27, 2020Publication date: September 24, 2020Inventors: Xi CEN, Feiyue MA, Kai WU, Yu LEI, Kazuya DAITO, Yi XU, Vikash BANTHIA, Mei CHANG, He REN, Raymond Hoiman HUNG, Yakuan YAO, Avgerinos V. GELATOS, David T. OR, Jing ZHOU, Guoqiang JIAN, Chi-Chou LIN, Yiming LAI, Jia YE, Jenn-Yue WANG
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Patent number: 10727119Abstract: Interconnects and methods for forming interconnects are described and disclosed herein. The interconnect contains a stack formed on a substrate having a via and a trench formed therein, a first metal formed from a first material of a first type deposited in the via, and a second metal formed from a second material of a second type deposited in the trench.Type: GrantFiled: January 18, 2019Date of Patent: July 28, 2020Assignee: Applied Materials, Inc.Inventors: He Ren, Feiyue Ma, Yu Lei, Kai Wu, Mehul B. Naik, Zhiyuan Wu, Vikash Banthia, Hua Ai
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Publication number: 20190385838Abstract: Methods to selectively deposit a film on a first surface (e.g., a metal surface) relative to a second surface (e.g., a dielectric surface) by exposing the surface to a pre-clean plasma comprising one or more of argon or hydrogen followed by deposition. The first surface and the second surface can be substantially coplanar. The selectivity of the deposited film may be increased by an order of magnitude relative to the substrate before exposure to the pre-cleaning plasma.Type: ApplicationFiled: August 26, 2019Publication date: December 19, 2019Inventors: Kai Wu, Vikash Banthia, Sang Ho Yu, Mei Chang, Feiyue Ma
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Patent number: 10395916Abstract: Methods to selectively deposit a film on a first surface (e.g., a metal surface) relative to a second surface (e.g., a dielectric surface) by exposing the surface to a pre-clean plasma comprising one or more of argon or hydrogen followed by deposition. The first surface and the second surface can be substantially coplanar. The selectivity of the deposited film may be increased by an order of magnitude relative to the substrate before exposure to the pre-cleaning plasma.Type: GrantFiled: September 8, 2017Date of Patent: August 27, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Kai Wu, Vikash Banthia, Sang Ho Yu, Mei Chang, Feiyue Ma
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Publication number: 20190214230Abstract: Exemplary methods for etching a variety of metal-containing materials may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and a metal-containing material arranged within a plurality of recesses defined by the two vertical columns. The plurality of recesses may include a first recess and a second recess adjacent to the first recess. The metal-containing material arranged within the first recess and the metal-containing material arranged within the second recess may be connected by the metal-containing material lining a portion of sidewalls of the trench. The methods may further include oxidizing the metal-containing material with the oxygen-containing precursor. The methods may also include flowing a halide precursor into the semiconductor processing chamber.Type: ApplicationFiled: March 5, 2018Publication date: July 11, 2019Applicant: Applied Materials, Inc.Inventors: Zhenjiang Cui, Nitin Ingle, Feiyue Ma, Hanshen Zhang, Siliang Chang, Daniella Holm
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Publication number: 20190214229Abstract: Exemplary methods for laterally etching tungsten may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and tungsten slabs arranged within a plurality of recesses defined by at least one of the two vertical columns. At least two of the tungsten slabs may be connected by tungsten lining a portion of sidewalls of the trench. The methods may further include oxidizing the tungsten connecting the at least two of the tungsten slabs with the oxygen-containing precursor. The methods may include flowing a halide precursor into the semiconductor processing chamber. The methods may also include laterally etching the oxidized tungsten from the sidewalls of the trench.Type: ApplicationFiled: January 8, 2018Publication date: July 11, 2019Applicant: Applied Materials, Inc.Inventors: Zhenjiang Cui, Nitin Ingle, Feiyue Ma, Hanshen Zhang, Siliang Chang, Daniella Holm
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Publication number: 20190157145Abstract: Interconnects and methods for forming interconnects are described and disclosed herein. The interconnect contains a stack formed on a substrate having a via and a trench formed therein, a first metal formed from a first material of a first type deposited in the via, and a second metal formed from a second material of a second type deposited in the trench.Type: ApplicationFiled: January 18, 2019Publication date: May 23, 2019Inventors: He REN, Feiyue MA, Yu LEI, Kai WU, Mehul B. NAIK, Zhiyuan WU, Vikash BANTHIA, Hua AI
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Patent number: 10256144Abstract: Embodiments of the present disclosure generally relate an interconnect formed on a substrate and a method of forming the interconnect thereon. In an embodiment, a via and trench in a stack formed on the substrate. A bottom of the via is pre-treated using a first pre-treatment procedure. A sidewall of the via is pre-treated using a second pre-treatment procedure. A first metal fill material of a first type is deposited on the stack, in the via. A second metal fill material of a second type is deposited on the stack, in the trench.Type: GrantFiled: April 26, 2017Date of Patent: April 9, 2019Assignee: Applied Materials, Inc.Inventors: He Ren, Feiyue Ma, Yu Lei, Kai Wu, Mehul B. Naik, Zhiyuan Wu, Vikash Banthia, Hua Al
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Publication number: 20180315650Abstract: Embodiments of the present disclosure generally relate an interconnect formed on a substrate and a method of forming the interconnect thereon. In an embodiment, a via and trench in a stack formed on the substrate. A bottom of the via is pre-treated using a first pre-treatment procedure. A sidewall of the via is pre-treated using a second pre-treatment procedure. A first metal fill material of a first type is deposited on the stack, in the via. A second metal fill material of a second type is deposited on the stack, in the trench.Type: ApplicationFiled: April 26, 2017Publication date: November 1, 2018Inventors: He REN, Feiyue MA, Yu LEI, Kai WU, Mehul B. NAIK, Zhiyuan WU, Vikash BANTHIA, Hua AI
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Publication number: 20180144973Abstract: Methods to selectively deposit capping layers on a copper surface relative to a dielectric surface comprising separately the copper surface to a cobalt precursor gas and a tungsten precursor gas, each in a separate processing chamber. The copper surface and the dielectric surfaces can be substantially coplanar. The combined thickness of cobalt and tungsten capping films is in the range of about 2 ? to about 60 ?.Type: ApplicationFiled: November 1, 2017Publication date: May 24, 2018Inventors: Weifeng Ye, Jiang Lu, Feng Chen, Zhiyuan Wu, Kai Wu, Vikash Banthia, He Ren, Sang Ho Yu, Mei Chang, Feiyue Ma, Yu Lei, Keyvan Kashefizadeh, Kevin Moraes, Paul F. Ma, Hua Ai
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Publication number: 20180145034Abstract: Methods of forming a contact line comprising cleaning the surface of a cobalt film in a trench and forming a protective layer on the surface of the cobalt, the protective layer comprising one or more of a silicide or germide. Semiconductor devices with the contact lines are also disclosed.Type: ApplicationFiled: November 20, 2017Publication date: May 24, 2018Inventors: Yi Xu, Feiyue Ma, Yu Lei, Kazuya Daito, Vikash Banthia, Kai Wu, Jenn Yue Wang, Mei Chang
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Patent number: 9947578Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.Type: GrantFiled: November 22, 2016Date of Patent: April 17, 2018Assignee: APPLIED MATERIALS, INC.Inventors: Yu Lei, Vikash Banthia, Kai Wu, Xinyu Fu, Yi Xu, Kazuya Daito, Feiyue Ma, Pulkit Agarwal, Chi-Chou Lin, Dien-Yeh Wu, Guoqiang Jian, Wei V. Tang, Jonathan Bakke, Mei Chang, Sundar Ramamurthy
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Publication number: 20180076020Abstract: Methods to selectively deposit a film on a first surface (e.g., a metal surface) relative to a second surface (e.g., a dielectric surface) by exposing the surface to a pre-clean plasma comprising one or more of argon or hydrogen followed by deposition. The first surface and the second surface can be substantially coplanar. The selectivity of the deposited film may be increased by an order of magnitude relative to the substrate before exposure to the pre-cleaning plasma.Type: ApplicationFiled: September 8, 2017Publication date: March 15, 2018Inventors: Kai Wu, Vikash Banthia, Sang Ho Yu, Mei Chang, Feiyue Ma
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Publication number: 20170148670Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.Type: ApplicationFiled: November 22, 2016Publication date: May 25, 2017Inventors: YU LEI, VIKASH BANTHIA, KAI WU, XINYU FU, YI XU, KAZUYA DAITO, FEIYUE MA, PULKIT AGARWAL, CHI-CHOU LIN, DIEN-YEH WU, GUOQIANG JIAN, WEI V. TANG, JONATHAN BAKKE, MEI CHANG, SUNDAR RAMAMURTHY