Abstract: Multiple listlets function as a single master linked list to manage data packets across one or more banks of memory in a first-in first-out (FIFO) order, while allowing multiple push and/or pop functions to be performed per cycle. Each listlet can be a linked list that tracks pointers and is stored in a different memory bank. The nodes can include a pointer to a data packet, a pointer to the next node in the listlet and a next listlet identifier that identifies the listlet that contains the next node in the master linked list. The head and tail of each listlet, as well as an identifier each to track the head and tail of the master linked list, can be maintained in cache. The individual listlets are updated accordingly to maintain order of the master linked list as pointers are pushed and popped from the master linked list.

Abstract: Multiple listlets function as a single master linked list to manage data packets across one or more banks of memory in a first-in first-out (FIFO) order, while allowing multiple push and/or pop functions to be performed per cycle. Each listlet can be a linked list that tracks pointers and is stored in a different memory bank. The nodes can include a pointer to a data packet, a pointer to the next node in the listlet and a next listlet identifier that identifies the listlet that contains the next node in the master linked list. The head and tail of each listlet, as well as an identifier each to track the head and tail of the master linked list, can be maintained in cache. The individual listlets are updated accordingly to maintain order of the master linked list as pointers are pushed and popped from the master linked list.

Abstract: Provided are a method, a non-transitory computer-readable storage device and an apparatus for managing use of a shared memory buffer that is partitioned into multiple banks and that stores incoming data received at multiple inputs in accordance with a multi-slice architecture. A particular bank is allocated to a corresponding slice. Received respective data packets are associated with corresponding slices based on which respective inputs they are received. Determine, based on a state of the shared memory buffer, to transfer contents of all occupied cells of the particular bank. Writes to the bank are stopped, contents of occupied cells are transferred to cells of one or more other banks associated with the particular bank's slice, information is stored indicating where the contents have been transferred, and the particular bank is returned to a shared pool after transferring is completed.

Abstract: Provided are a method, a non-transitory computer-readable storage device and an apparatus for managing use of a shared memory buffer that is partitioned into multiple banks and that stores incoming data received at multiple inputs in accordance with a multi-slice architecture. A particular bank is allocated to a corresponding slice. Received respective data packets are associated with corresponding slices based on which respective inputs they are received. Determine, based on a state of the shared memory buffer, to transfer contents of all occupied cells of the particular bank. Writes to the bank are stopped, contents of occupied cells are transferred to cells of one or more other banks associated with the particular bank's slice, information is stored indicating where the contents have been transferred, and the particular bank is returned to a shared pool after transferring is completed.

Abstract: Multiple listlets function as a single master linked list to manage data packets across one or more banks of memory in a first-in first-out (FIFO) order, while allowing multiple push and/or pop functions to be performed per cycle. Each listlet can be a linked list that tracks pointers and is stored in a different memory bank. The nodes can include a pointer to a data packet, a pointer to the next node in the listlet and a next listlet identifier that identifies the listlet that contains the next node in the master linked list. The head and tail of each listlet, as well as an identifier each to track the head and tail of the master linked list, can be maintained in cache. The individual listlets are updated accordingly to maintain order of the master linked list as pointers are pushed and popped from the master linked list.

Abstract: A switched capacitor integrator particularly suitable to realize low-pass filters without inducing noise on the nodes of the reference potentials of the integrator, is provided by halving the input capacitance during an operating phase, and by transferring the electric charge between the input switched capacitance and the capacitor of integration of one and the other feedback branch of the differential amplifier, in a direct manner, that is, not referred to a fixed common potential. A unique current path is established, thus averting the effects caused by inevitable mismatches between the integrated capacitors.