Patents by Inventor Felipe Althoff

Felipe Althoff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11023357
    Abstract: A method for sequential equivalence checking (SEC) of two representations of an electronic design may include using a processor, automatically selecting a plurality of cutpoints in the two representations of the electronic design; using a processor, automatically executing a prove-from strategy on the plurality of cut point pairs to identify a failed cut point pair in the two electronic designs; and using the processor, automatically extending a trace corresponding to the identified failed cut point pair to identify a deeper failed cut point pair or a failed output pair in the two electronic designs.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: June 1, 2021
    Assignee: Cadence Design Systems, Inc.
    Inventors: Ayman Hanna, Karam Abdelkader, Doron Bustan, Habeeb Farah, Thiago Radicchi Roque, Felipe Althoff
  • Patent number: 10956640
    Abstract: The present disclosure relates to a method for electronic design verification. Embodiments may include receiving, using a processor, an electronic design and providing at least a portion of the electronic design to a machine learning engine. Embodiments may further include automatically determining, based upon, at least in part, an output of the machine learning engine whether or not the at least a portion of the electronic design is amenable to formal verification.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: March 23, 2021
    Assignee: Cadence Design Systems, Inc.
    Inventors: Georgia Penido Safe, Mirlaine Aparecida Crepalde, Yumi Monma, Felipe Althoff, Fernanda Augusta Braga, Lucas Martins Chaves, Pedro Bruno Neri Silva, Mariana Ferreira Marques, Vincent Gregory Reynolds