Abstract: Techniques are described in which a system having multiple processing units processes a series of work units in a processing pipeline, where some or all of the work units access or manipulate data stored in non-coherent memory. In one example, this disclosure describes a method that includes identifying, prior to completing processing of a first work unit with a processing unit of a processor having multiple processing units, a second work unit that is expected to be processed by the processing unit after the first work unit. The method also includes processing the first work unit, and prefetching, from non-coherent memory, data associated with the second work unit into a second cache segment of the buffer cache, wherein prefetching the data associated with the second work unit occurs concurrently with at least a portion of the processing of the first work unit by the processing unit.

Abstract: Techniques are described in which a system having multiple processing units processes a series of work units in a processing pipeline, where some or all of the work units access or manipulate data stored in non-coherent memory. In one example, this disclosure describes a method that includes identifying, prior to completing processing of a first work unit with a processing unit of a processor having multiple processing units, a second work unit that is expected to be processed by the processing unit after the first work unit. The method also includes processing the first work unit, and prefetching, from non-coherent memory, data associated with the second work unit into a second cache segment of the buffer cache, wherein prefetching the data associated with the second work unit occurs concurrently with at least a portion of the processing of the first work unit by the processing unit.

Abstract: Techniques are described in which a device, such as a network device, compute node or storage device, is configured to utilize a work unit (WU) stack data structure in a multiple core processor system to help manage an event driven, run-to-completion programming model of an operating system executed by the multiple core processor system. The techniques may be particularly useful when processing streams of data at high rates. The WU stack may be viewed as a stack of continuation work units used to supplement a typical program stack as an efficient means of moving the program stack between cores. The work unit data structure itself is a building block in the WU stack to compose a processing pipeline and services execution. The WU stack structure carries state, memory, and other information in auxiliary variables.

Abstract: A new processing architecture is described that utilizes a data processing unit (DPU). Unlike conventional compute models that are centered around a central processing unit (CPU), the DPU that is designed for a data-centric computing model in which the data processing tasks are centered around the DPU. The DPU may be viewed as a highly programmable, high-performance I/O and data-processing hub designed to aggregate and process network and storage I/O to and from other devices. The DPU comprises a network interface to connect to a network, one or more host interfaces to connect to one or more application processors or storage devices, and a multi-core processor with two or more processing cores executing a run-to-completion data plane operating system and one or more processing cores executing a multi-tasking control plane operating system. The data plane operating system is configured to support software functions for performing the data processing tasks.

Abstract: A highly-programmable access node is described that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from storage devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to execute a large number of data I/O processing tasks relative to a number of instructions that are processed. The access node may be highly programmable such that the access node may expose hardware primitives for selecting and programmatically configuring data processing operations. As one example, the access node may be used to provide high-speed connectivity and I/O operations between and on behalf of computing devices and storage components of a network, such as for providing interconnectivity between those devices and a switch fabric of a data center.

Abstract: A new processing architecture is described in which a data processing unit (DPU) is utilized within a device. Unlike conventional compute models that are centered around a central processing unit (CPU), example implementations described herein leverage a DPU that is specially designed and optimized for a data-centric computing model in which the data processing tasks are centered around, and the primary responsibility of, the DPU. For example, various data processing tasks, such as networking, security, and storage, as well as related work acceleration, distribution and scheduling, and other such tasks are the domain of the DPU. The DPU may be viewed as a highly programmable, high-performance input/output (I/O) and data-processing hub designed to aggregate and process network and storage I/O to and from multiple other components and/or devices. This frees resources of the CPU, if present, for computing-intensive tasks.

Abstract: A portable object including a case middle closed by a back cover, in which an electronic module is placed, the electronic module including a plate to which a printed circuit board is secured, the printed circuit board carrying at least one contact area connected to at least one input of at least one integrated circuit, the integrated circuit supplying at least one signal to an electronic signal processing device. The portable object further includes a detection member changing from at least a first position, indicating that the back cover is secured to the case middle, to a second position, indicating that the back cover is not secured to the case middle.

Abstract: A portable object including a case middle closed by a back cover, in which an electronic module is placed, the electronic module including a plate to which a printed circuit board is secured, the printed circuit board carrying at least one contact area connected to at least one input of at least one integrated circuit, the integrated circuit supplying at least one signal to an electronic signal processing device. The portable object further includes a detection member changing from at least a first position, indicating that the back cover is secured to the case middle, to a second position, indicating that the back cover is not secured to the case middle.

Abstract: A host is coupled to a network via an intelligent network adaptor. The host is executing an application configured to receive application data from a peer via the network and the intelligent network adaptor using a stateful connection according to a connection-oriented protocol. The intelligent network adaptor performs protocol processing of the connection. Application data is copied from host memory not configured for access by the application (possibly OS-associated host memory) to host memory associated with the application (application-associated host memory). The application data is received from the peer by the intelligent network adaptor and copied to host memory not configured for access by the application. The operating system selectively provides, to the intelligent network adaptor, information of the memory associated with the application.

Abstract: A host is coupled to a network via an intelligent network adaptor. The host is executing an application configured to receive application data from a peer via the network and the intelligent network adaptor using a stateful connection according to a connection-oriented protocol. The intelligent network adaptor performs protocol processing of the connection. Application data is copied from host memory not configured for access by the application (possibly OS-associated host memory) to host memory associated with the application (application-associated host memory). The application data is received from the peer by the intelligent network adaptor and copied to host memory not configured for access by the application. The operating system selectively provides, to the intelligent network adaptor, information of the memory associated with the application.

Abstract: An RDMA Network Interface Controller (NIC) is operated to accomplish an RDMA WRITE operation initiated by an application operating on a host computing device to which the RDMA NIC is coupled for RDMA communication over a network with a peer device. The RDMA NIC receives an RDMA WRITE request from the host device, for writing data from a memory associated with the host device to a memory associated with the peer device using an RDMA protocol. The RDMA NIC initiates an RDMA WRITE operation from the memory associated with the host device to the memory associated with the peer device. Furthermore, the RDMA NIC automatically generates a completion indication for the RDMA WRITE operation to the host computing device by performing an RDMA READ operation and converting a READ COMPLETION for the RDMA READ operation to the completion indication for the RDMA WRITE operation.

Abstract: A host is coupled to a network via an intelligent network adaptor. The host is executing an application configured to receive application data from a peer via the network and the intelligent network adaptor using a stateful connection according to a connection-oriented protocol. The intelligent network adaptor performs protocol processing of the connection. Application data is copied from host memory not configured for access by the application (possibly OS-associated host memory) to host memory associated with the application (application-associated host memory). The application data is received from the peer by the intelligent network adaptor and copied to host memory not configured for access by the application. The operating system selectively provides, to the intelligent network adaptor, information of the memory associated with the application.

Abstract: A host is coupled to a network via an intelligent network adaptor. The host is executing an application configured to receive application data from a peer via the network and the intelligent network adaptor using a stateful connection according to a connection-oriented protocol. The intelligent network adaptor performs protocol processing of the connection. Application data is copied from host memory not configured for access by the application (possibly OS-associated host memory) to host memory associated with the application (application-associated host memory). The application data is received from the peer by the intelligent network adaptor and copied to host memory not configured for access by the application. The operating system selectively provides, to the intelligent network adaptor, information of the memory associated with the application.

Abstract: The invention concerns a device for mounting a pressure sensor simply and precisely on the back cover (11) of a diver's watch or altimeter watch. The pressure sensor (31) is driven into an intermediate ring (33) forming part of a sensor module (30) which further includes an additional PCB (34), a sensor support (35) and connecting elements (38) between the additional PCB (34) and a main PCB of the watch. To ensure very precise positioning relative to the back cover, the intermediate ring (33) includes feet (35) that engage in holes in the additional PCB and in the sensor support. A sealing gasket (32) is radially compressed between the wall of the orifice (12) of the back cover and a tubular casing (47) of the pressure sensor. The back cover (11) is covered externally by a perforated cover.

Abstract: The invention concerns a device for mounting a pressure sensor simply and precisely on the back cover (11) of a diver's watch or altimeter watch. The pressure sensor (31) is driven into an intermediate ring (33) forming part of a sensor module (30) which further includes an additional PCB (34), a sensor support (35) and connecting elements (38) between the additional PCB (34) and a main PCB of the watch. To ensure very precise positioning relative to the back cover, the intermediate ring (33) includes feet (35) that engage in holes in the additional PCB and in the sensor support. A sealing gasket (32) is radially compressed between the wall of the orifice (12) of the back cover and a tubular casing (47) of the pressure sensor. The back cover (11) is covered externally by a perforated cover.