Patents by Inventor Felix Kao
Felix Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7569912Abstract: An integrated circuit design for differential variable capacitors uses an integration method to integrate an integrated circuit having differential variable capacitors as a whole, and takes the parasitic effect into consideration for the manufacturing process to lower the circuit inaccuracy and reduce the chip size effectively. Such arrangement lowers the manufacturing cost, identifies the quality of loading quality of the overall variable capacitance during the manufacture, and further controls the quality of loading capacity of the overall variable capacitance effectively. Furthermore, this invention does not need to reposition for the symmetrical position of the coils, and thus giving a very precise positioning to reduce the level of difficulty for the manufacture.Type: GrantFiled: May 24, 2006Date of Patent: August 4, 2009Assignee: Via Technologies, Inc.Inventors: Bour-Yi Sze, Felix Kao, Chih-Long Ho
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Publication number: 20060254814Abstract: The invention is directed to an electric device featuring a ground shield structure. The electric device at lease comprises a plurality of first ground cells and a plurality of second ground cells. The first ground cells are distributed on a ground surface, wherein the first ground cell has at least one first outward section and at least one first inward section. The second ground cells are distributed on the ground surface, wherein the second ground cell has at least one second outward section and one second outward section of one second ground cell is compactly and complementarily embraced by one first inward section of one adjacent first ground cell.Type: ApplicationFiled: July 14, 2006Publication date: November 16, 2006Inventors: Bouryi Sze, Bob Cheng, Chih-Long Ho, Felix Kao
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Publication number: 20060214264Abstract: An integrated circuit design for differential variable capacitors uses an integration method to integrate an integrated circuit having differential variable capacitors as a whole, and takes the parasitic effect into consideration for the manufacturing process to lower the circuit inaccuracy and reduce the chip size effectively. Such arrangement lowers the manufacturing cost, identifies the quality of loading quality of the overall variable capacitance during the manufacture, and further controls the quality of loading capacity of the overall variable capacitance effectively. Furthermore, this invention does not need to reposition for the symmetrical position of the coils, and thus giving a very precise positioning to reduce the level of difficulty for the manufacture.Type: ApplicationFiled: May 24, 2006Publication date: September 28, 2006Applicant: VIA TECHNOLOGIES, INC.Inventors: Bour-Yi Sze, Felix Kao, Chih-Long Ho
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Patent number: 6967555Abstract: An inductor includes a substrate, a first insulation layer, a second insulation layer, a first conductive section, a second conductive section, a third conductive section, and a fourth conductive section. The first conductive section and the second conductive section are symmetrical with respect to a first line. The third conductive section and the fourth conductive section are also symmetrical with respect to the first line. The first end of the first conductive section is connected to the first end of the fourth conductive section with a first via plug. The first end of the second conductive section is connected to the first end of the third conductive section with a second via plug.Type: GrantFiled: June 18, 2003Date of Patent: November 22, 2005Assignee: VIA Technologies Inc.Inventors: Jay Yu, Felix Kao
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Publication number: 20050133886Abstract: An integrated circuit design for differential variable capacitors uses an integration method to integrate an integrated circuit having differential variable capacitors as a whole, and takes the parasitic effect into consideration for the manufacturing process to lower the circuit inaccuracy and reduce the chip size effectively. Such arrangement lowers the manufacturing cost, identifies the quality of loading quality of the overall variable capacitance during the manufacture, and further controls the quality of loading capacity of the overall variable capacitance effectively. Furthermore, this invention does not need to reposition for the symmetrical position of the coils, and thus giving a very precise positioning to reduce the level of difficulty for the manufacture.Type: ApplicationFiled: February 19, 2004Publication date: June 23, 2005Inventors: Felix Kao, Bouryi Sze
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Publication number: 20050016746Abstract: A ground shield structure is suitable for use in a circuit structure. The ground shield structure has a plurality of ground cells that are arranged on a ground plane periodically, compactly and complementarily. The slots between the ground cells are used to reduce the eddy current generated on the ground shield structure. The ground shield structure increases the slow-wave factor to slow the waves so that the area of the circuit layout can be decreased. Besides, the ground shield structure can reduce the energy loss of the inner circuit of the circuit structure and can increase the quantities of inductance and capacitance in per unit area thereon.Type: ApplicationFiled: October 7, 2003Publication date: January 27, 2005Inventors: Bouryi Sze, Bob Cheng, Chih-Long Ho, Felix Kao
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Patent number: 6798327Abstract: An integrated circuit transformer includes a first conductive segment, a second conductive segment, a fifth conductive segment, and a sixth conductive segment, all disposed inside a first insulating layer. The first conductive segment, the second conductive segment, the fifth conductive segment, and the sixth conductive segment are respectively symmetric to a first line. The transformer further includes a third conductive segment and a fourth conductive segment, both formed inside a second insulating layer. The third conductive segment and the fourth conductive segment are symmetric to a second line. The transformer further includes a fist connection conductive segment connecting the fifth conductive segment to the second conductive segment, and a second connection conductive segment connecting the sixth conductive segment to the first conductive segment.Type: GrantFiled: March 24, 2003Date of Patent: September 28, 2004Assignee: VIA Technologies Inc.Inventors: Jay Yu, Felix Kao
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Publication number: 20040080392Abstract: An integrated circuit transformer includes a first conductive segment, a second conductive segment, a fifth conductive segment, and a sixth conductive segment, all disposed inside a first insulating layer. The first conductive segment, the second conductive segment, the fifth conductive segment, and the sixth conductive segment are respectively symmetric to a first line. The transformer further includes a third conductive segment and a fourth conductive segment, both formed inside a second insulating layer. The third conductive segment and the fourth conductive segment are symmetric to a second line. The transformer further includes a fist connection conductive segment connecting the fifth conductive segment to the second conductive segment, and a second connection conductive segment connecting the sixth conductive segment to the first conductive segment.Type: ApplicationFiled: March 24, 2003Publication date: April 29, 2004Inventors: Jay Yu, Felix Kao
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Publication number: 20040075521Abstract: An inductor includes a substrate, a first insulation layer, a second insulation layer, a first conductive section, a second conductive section, a third conductive section, and a fourth conductive section. The first conductive section and the second conductive section are symmetrical with respect to a first line. The third conductive section and the fourth conductive section are also symmetrical with respect to the first line. The first end of the first conductive section is connected to the first end of the fourth conductive section with a first via plug. The first end of the second conductive section is connected to the first end of the third conductive section with a second via plug.Type: ApplicationFiled: June 18, 2003Publication date: April 22, 2004Inventors: Jay Yu, Felix Kao