Abstract: The invention refers to providing a control module allowing to reduce computational efforts for providing a luminaire with a tunable color temperature. The luminaire (100) comprises two light sources (112, 111), for instance, LEDs, wherein each light source generates white light at a different CCT. The control module comprises a color temperature providing unit (121) providing a desired color temperature, and an assignment providing unit (122) providing an assignment list comprising assignments, wherein each assignment comprises a predefined CCT to which brightness values for each light source are assigned. A brightness value determination unit (123) determines brightness values for the light sources based on the desired color temperature and the assignment list, and a control unit (124) controls the luminaire based on the determined brightness values. The control module allows to reduce the constructional and computational efforts for providing a color temperature tunable luminaire.

Abstract: The invention refers to providing a control module allowing to reduce computational efforts for providing a luminaire with a tunable color temperature. The luminaire (100) comprises two light sources (112, 111), for instance, LEDs, wherein each light source generates white light at a different CCT. The control module comprises a color temperature providing unit (121) providing a desired color temperature, and an assignment providing unit (122) providing an assignment list comprising assignments, wherein each assignment comprises a predefined CCT to which brightness values for each light source are assigned. A brightness value determination unit (123) determines brightness values for the light sources based on the desired color temperature and the assignment list, and a control unit (124) controls the luminaire based on the determined brightness values. The control module allows to reduce the constructional and computational efforts for providing a color temperature tunable luminaire.

Abstract: A system and method for emulating single-cycle translation lookaside buffer invalidation are described. One embodiment of a method comprises defining a translation lookaside buffer (TLB) cache marking variable comprising a first marker value and a second marker value. A context bank marker associated with a translation context bank is initiated with one of the first marker value and the second marker value. A TLB cache entry table specifies whether each of a plurality of TLB cache entries associated with the translation context bank has a corresponding entry marker set to the first marker value or the second marker value. In response to a TLB invalidate command associated with the translation context bank, the context bank marker is changed from the one of the first marker value and the second marker value to the other of the first marker value and the second marker value prior to initiating TLB invalidation.

Abstract: A MMU may read page descriptors (using virtual addresses as an index) in a burst mode from page tables in a system memory. The page descriptors may include intermediate physical addresses (“IPAs”, in stage 1) and corresponding physical addresses (“PAs”, in stage 2). The virtual address in conjunction with page table base address register is used to index page descriptors into main memory. The MMU may identify a first group of contiguous IPAs beginning at a base IPA and a second group of contiguous IPAs beginning at an offset from the base IPA. The first and second groups may be separated by at least one IPA not contiguous with either the first or second group. The MMU may read a first PA from the page tables that corresponds to the base IPA. The MMU may store an entry in a buffer that includes the PA and a first linearity tag.

Abstract: Systems, methods, and computer programs are disclosed for reducing worst-case memory latency in a system comprising a system memory and a cache memory. One embodiment is a method comprising receiving a translation request from a memory client for a translation of a virtual address to a physical address. If the translation is not available at a translation buffer unit and a translation control unit in a system memory management unit, the translation control unit initiates a page table walk. During the page table walk, the method determines a page table entry for an intermediate physical address in the system memory. In response to determining the page table entry for the intermediate physical address, the method preloads data at the intermediate physical address to the system cache before the page table walk for a final physical address corresponding to the intermediate physical address is completed.

Abstract: A wireless communication device is disclosed that is capable of reduced power consumption. Uplink and downlink sub-frames in a WiMAX, 802.16m or LTE environment often include several vacant symbols during which power-hungry hardware and software components need not operate at full power. By analyzing a physical layer beacon and control information of a received signal, the specific locations of data bursts can be determined, as well as periods of needed operation of a receiver module to effectively decode those data bursts. The receiver module can otherwise be controlled to operate in a LOW power state during remaining periods of vacant time, thereby conserving power consumption and extending battery life.

Abstract: A wireless communication device is disclosed that is capable of reduced power consumption. Uplink and downlink sub-frames in a WiMAX, 802.16m or LTE environment often include several vacant symbols during which power-hungry hardware and software components need not operate at full power. By analyzing a physical layer beacon and control information of a received signal, the specific locations of data bursts can be determined, as well as periods of needed operation of a receiver module to effectively decode those data bursts. The receiver module can otherwise be controlled to operate in a LOW power state during remaining periods of vacant time, thereby conserving power consumption and extending battery life.