Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: Provided is a semiconductor device including a substrate having a lower portion and an upper portion on the lower portion; an isolation region disposed on the lower portion of the substrate and surrounding the upper portion of the substrate in a closed path; a gate structure disposed on and across the upper portion of the substrate; source and/or drain (S/D) regions disposed in the upper portion of the substrate at opposite sides of the gate structure; and a channel region disposed below the gate structure and abutting between the S/D regions, wherein the channel region and the S/D regions have different conductivity types, and the channel region and the substrate have the same conductivity type.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: Embodiments disclosed herein include transistors and methods of forming transistors. In an embodiment, a transistor comprises a source, a drain, and a pair of spacers between the source and the drain. In an embodiment, a semiconductor channel is between the source and the drain, where the semiconductor channel passes through the pair of spacers. In an embodiment, the semiconductor channel has a first thickness within the pair of spacers and a second thickness between the pair of spacers, where the second thickness is less than the first thickness. In an embodiment, the transistor further comprises a gate stack over the semiconductor channel between the pair of spacers.

Abstract: Methods for fabricating an integrated circuit (IC) device with a protection liner between doped semiconductor regions are provided. An example IC device includes a channel material having a first face and a second face opposite the first face, a first doped region and a second doped region in the channel material, extending from the second face towards the first face by a first distance; and an insulator structure in a portion of the channel material between the first and second doped regions, the insulator structure extending from the second face towards the first face by a second distance greater than the first distance. The insulator structure includes a first portion between the second face and the first distance and a second portion between first distance and the second distance. The insulator structure includes a liner material on sidewalls of the first portion but absent on sidewalls of the second portion.

Abstract: Embodiments of the present disclosure provide a video synthesis method and apparatus, an electronic device and a storage medium. In the method, a web front end receives an operation of a user on a to-be-processed video, and records operation information as a draft; and sends the draft to a server, where the draft is used to perform processing on the to-be-processed video and perform video synthesis after the processing, which realizes the purpose of video synthesis through a web end.

Abstract: Techniques are provided herein to form semiconductor devices having epitaxial growth laterally extending between inner spacer structures to mitigate issues caused by the inner spacer structures either being too thick or too thin. A directional etch is performed along the side of a multilayer fin to create a relatively narrow opening for a source or drain region to increase the usable fin space for forming the inner spacer structures. After the inner spacer structures are formed around ends of the semiconductor layers within the fin, the exposed ends of the semiconductor layers are laterally recessed inwards from the outermost sidewalls of the inner spacer structures. Accordingly, the epitaxial source or drain region is grown from the recessed semiconductor ends and thus fills in the recessed regions between the spacer structures.

Abstract: Techniques are provided herein to form semiconductor devices that include a layer across an upper surface of a dielectric fill between devices and configured to prevent or otherwise reduce recessing of the dielectric fill. In this manner, the layer may be referred to as a barrier layer or recess-inhibiting layer. The semiconductor regions of the devices extend above a subfin region that may be native to the substrate. These subfin regions are separated from one another using a dielectric fill that acts as a shallow trench isolation (STI) structure to electrically isolate devices from one another. A barrier layer is formed over the dielectric fill early in the fabrication process to prevent or otherwise reduce the dielectric fill from recessing during subsequent processing. The layer may include oxygen and a metal, such as aluminum.

Abstract: Fin trim plug structures with metal for imparting channel stress are described. In an example, an integrated circuit structure includes a fin including silicon, the fin having a top and sidewalls, wherein the top has a longest dimension along a direction. A first isolation structure is over a first end of the fin. A gate structure including a gate electrode is over the top of and laterally adjacent to the sidewalls of a region of the fin. The gate structure is spaced apart from the first isolation structure along the direction. A second isolation structure is over a second end of the fin, the second end opposite the first end, the second isolation structure spaced apart from the gate structure along the direction. The first isolation structure and the second isolation structure both include a dielectric material laterally surrounding an isolated metal structure.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.

Abstract: In a method of manufacturing a semiconductor device, a fin structure protruding from an isolation insulating layer disposed over a substrate is formed, a sacrificial gate dielectric layer is formed over the fin structure, a polysilicon layer is formed over the sacrificial gate dielectric layer, a mask pattern is formed over the polysilicon layer, and the polysilicon layer is patterned into a sacrificial gate electrode using the mask pattern as an etching mask. The sacrificial gate electrode has a narrow portion above a level of a top of the fin structure such that a width of the sacrificial gate electrode decreases, takes a local minimum, and then increases from the top of the fin structure.

Abstract: In a method of manufacturing a semiconductor device, a fin structure protruding from an isolation insulating layer disposed over a substrate is formed, a sacrificial gate dielectric layer is formed over the fin structure, a polysilicon layer is formed over the sacrificial gate dielectric layer, a mask pattern is formed over the polysilicon layer, and the polysilicon layer is patterned into a sacrificial gate electrode using the mask pattern as an etching mask. The sacrificial gate electrode has a narrow portion above a level of a top of the fin structure such that a width of the sacrificial gate electrode decreases, takes a local minimum, and then increases from the top of the fin structure.

Abstract: A torque capacity expandable device and method for a torque multiplier are introduced. The device includes a connection sleeve and a torque multiplier. The connection sleeve, fitted to a torque wrench and the torque multiplier and fastened, has a force-applied end corresponding in dimensions to a force-applying end of the torque wrench and has another end corresponding in dimensions to the force-applied end of the torque multiplier. An integral fastening mechanism is integrally fitted to or formed with each of the two ends of the torque multiplier. Its force-applied end fastening mechanism has the same dimensions as the force-applying end fastening mechanism of connection sleeve. Its force-applying end fastening mechanism has the same dimensions as the force-applied end fastening mechanism of a reaction arm disposed at the force-applying end fastening mechanism of torque multiplier.

Abstract: A traffic control method, adapted to a server, includes detecting a packet sent by user equipment and transmitted through a base station to obtain packet information of the packet, wherein the packet information comprises an Internet protocol address, determining whether the packet information is abnormal, tagging identification information corresponding to the Internet protocol address when the packet information is abnormal, and blocking a connection between the user equipment and a network based on the identification information.

Abstract: An example computing device includes a power switch, a power management device to control a power state change of the computing device based on a command from a power control device, and a controller. The controller is to, in response to receiving a power control request message from an external device, change the power control device from the power switch to the external device.

Abstract: A torque capacity expandable device and method for a torque multiplier are introduced. The device includes a connection sleeve and a torque multiplier. The connection sleeve, fitted to a torque wrench and the torque multiplier and fastened, has a force-applied end corresponding in dimensions to a force-applying end of the torque wrench and has another end corresponding in dimensions to the force-applied end of the torque multiplier. An integral fastening mechanism is integrally fitted to or formed with each of the two ends of the torque multiplier. Its force-applied end fastening mechanism has the same dimensions as the force-applying end fastening mechanism of connection sleeve. Its force-applying end fastening mechanism has the same dimensions as the force-applied end fastening mechanism of a reaction arm disposed at the force-applying end fastening mechanism of torque multiplier.

Abstract: A bolt clamping force transducer for a bolt tightening operation is introduced to tighten a bolted joint by driving a torque rotating shaft in a clamping force transducer, such that a helical mechanism at one end of the torque rotating shaft generates an axial force for pressing a force sensing module and thus generates a strain value thereof. A socket is driven by the other end of the torque rotating shaft, thereby generating a clamping force under which the bolted joint of a specific specification is tightened. A parameter relation between the strain value and the clamping force is calibrated with a standard axial force gauge to facilitate calculation and control of the clamping force during the tightening process where the bolted joint fitted to any torque tool is sensed to control the precision of the clamping force being exerted on the bolted joint, thereby enhancing the quality thereof.

Abstract: In a method of manufacturing a semiconductor device, a fin structure protruding from an isolation insulating layer disposed over a substrate is formed, a sacrificial gate dielectric layer is formed over the fin structure, a polysilicon layer is formed over the sacrificial gate dielectric layer, a mask pattern is formed over the polysilicon layer, and the polysilicon layer is patterned into a sacrificial gate electrode using the mask pattern as an etching mask. The sacrificial gate electrode has a narrow portion above a level of a top of the fin structure such that a width of the sacrificial gate electrode decreases, takes a local minimum, and then increases from the top of the fin structure.

Abstract: A bolt clamping force transducer for a bolt tightening operation is introduced to tighten a bolted joint by driving a torque rotating shaft in a clamping force transducer, such that a helical mechanism at one end of the torque rotating shaft generates an axial force for pressing a force sensing module and thus generates a strain value thereof. A socket is driven by the other end of the torque rotating shaft, thereby generating a clamping force under which the bolted joint of a specific specification is tightened. A parameter relation between the strain value and the clamping force is calibrated with a standard axial force gauge to facilitate calculation and control of the clamping force during the tightening process where the bolted joint fitted to any torque tool is sensed to control the precision of the clamping force being exerted on the bolted joint, thereby enhancing the quality thereof.

Abstract: A bolt clamping force sensing washer includes a sensing washer, connection line assembly, and signal processor. The sensing washer includes a body, sensing component, and bushing. The body has an axial hole that matches outer diameter of a bolt's thread. The circumferential surface of the body has a circumferential groove for receiving the sensing component which measures a deformation signal generated by the body under an axial load. Two end surfaces of the body are perpendicular to the axial hole and each have a loosening-proof structure. The bushing is made of metal or plastic or formed by plastic insulating material casting to enclose the sensing component. The signal processor has a signal amplifier, microprocessor, pairing switch, power circuit unit, signal transmission unit, memory unit, RF antenna and alert unit. The connection line assembly is disposed at the bushing to electrically connect the sensing component and signal processor.