Abstract: A micro-electro-mechanical system (MEMS) microphone is provided. The MEMS microphone includes a substrate, a backplate, an insulating layer, and a diaphragm. The substrate has an opening portion. The backplate is disposed on a side of the substrate, with protrusions protruding toward the substrate. The diaphragm is movably disposed between the substrate and the backplate and spaced apart from the backplate by a spacing distance. The protrusions are configured to limit the deformation of the diaphragm when air flows through the opening portion.

Abstract: A key structure comprising an upper and lower key stem, a rotatable middle key stem including a magnetized element disposed therein, the rotatable middle key stem coupled between and in axial alignment with the upper and lower key stems, and a magnetic field generator configured to steer a magnetic field through the magnetized element of the rotatable middle key stem. The rotatable middle key stem is operable to be longitudinally rotatable between a first and second position, while the upper and lower key stems are rotationally fixed. The generated magnetic field, when at a first setting, applies a first magnetic force on the magnetized element causing the middle key stem to rotate to the first position, and when at a second setting, applies a second magnetic force on the magnetized element causing the middle key stem to rotate to the second position.

Abstract: Provided in the present disclosure is an antibody or fragment thereof against a human growth and differentiation factor 15 (GDF15). Further provided in the present disclosure is the use of the antibody or fragment thereof in the preparation of a drug for treating diseases or conditions. The antibody or fragment thereof provided in the present disclosure can bind to human GDF15 with high affinity and specificity, blocks the interaction of GDF15 with receptor GFRAL thereof, and has a longer half-life period in vivo in comparison with antibodies of the same kind.

Abstract: An operating method of a fully homomorphic encrypted neural network model is provided, wherein the fully homomorphic encrypted neural network model includes a plurality of layers, and the method performed by a processor includes: for one of the plurality of layers, encrypting a plaintext input with a first encryption algorithm to generate a ciphertext vector, performing a convolution operation according to the ciphertext vector to generate a result vector, transforming the result vector into a plurality of result ciphertexts adopting a second encryption algorithm, inputting the plurality of result ciphertexts into an activation function to generate a plurality of encrypted activation values, and repacking the plurality of encrypted activation values to generate an output vector adopting the first encryption algorithm.

Abstract: A universal memory device includes an array of universal memory cells. Each universal memory cell includes a write transistor and a read transistor. The write transistor has a gate terminal configured to receive a gate voltage to turn on or off the write transistor, a first terminal configured to receive a write voltage, and a second terminal coupled to a gate terminal of the read transistor. The read transistor includes a charge trap layer at the gate terminal of the read transistor. The charge trap layer is configured to: be unalterable when the first write voltage is applied at the first terminal of the write transistor, and be alterable when the second write voltage is applied at the first terminal of the write transistor to change a threshold voltage of the read transistor. The second write voltage is greater than the first write voltage.

Abstract: The present application provides a processing method of a metal composite structure including a first metal layer and a second metal layer stacked on the first metal layer. The processing method includes the steps of defining a first through hole in the first metal layer, and drilling in the first through hole toward the second metal layer to form a traction hole in the second metal layer. Then, hot melt drilling is performed on a surface of the second metal layer away from the first metal layer toward the first through hole, thereby causing the second metal layer to crack under a traction force of the traction hole to form a second through hole, and a portion of the second metal layer to be melted and squeezed to form a bushing which adheres to at least a portion of a sidewall of the first through hole.

Abstract: An inference method for encrypted deep neural network model is executed by a computing device and includes: encoding a message according to a quantization parameter to generate a plaintext, encrypting the plaintext according to a private key to generate a ciphertext, sending the ciphertext to a deep neural network model to generate a ciphertext result, decrypting the ciphertext result according to the private key to generate a plaintext result, and decoding the plaintext result according to the quantization parameter to generate an inference result.

Abstract: A display device and a backlight control method of the display device are provided. When a duration of an image occlusion period is shorter than a preset duration, a backlight driving circuit is controlled to respectively provide a first pulse current and a second pulse current in a first light emitting period and a second light emitting period in each frame period, so as to drive a backlight unit to provide a first backlight and a second backlight. Here, the first pulse current is greater than the second pulse current.

Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.

Abstract: A semiconductor image sensing structure includes a substrate having a first region and a second region, a metal grid in the first region, and a hybrid metal shield in the second region. The hybrid metal shield includes a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer. An included angle of the second metallization layer is between approximately 40° and approximately 60°.

Abstract: SRAM designs based on GAA transistors are disclosed that provide flexibility for increasing channel widths of transistors at scaled IC technology nodes and relax limits on SRAM performance optimization imposed by FinFET-based SRAMs. GAA-based SRAM cells described have active region layouts with active regions shared by pull-down GAA transistors and pass-gate GAA transistors. A width of shared active regions that correspond with the pull-down GAA transistors are enlarged with respect to widths of the shared active regions that correspond with the pass-gate GAA transistors. A ratio of the widths is tuned to obtain ratios of pull-down transistor effective channel width to pass-gate effective channel width greater than 1, increase an on-current of pull-down GAA transistors relative to an on-current of pass-gate GAA transistors, decrease a threshold voltage of pull-down GAA transistors relative to a threshold voltage of pass-gate GAA transistors, and/or increases a ? ratio of an SRAM cell.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate and a backplate, the substrate has an opening portion, and the backplate is disposed on one side of the substrate and has acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate, and the diaphragm extends across the opening portion of the substrate and includes outer ventilation holes and inner ventilation holes arranged in a concentric manner. The outer ventilation holes and the inner ventilation holes are relatively arranged in a ring shape and surround the center of the diaphragm. The MEMS structure further includes a pillar disposed between the backplate and the diaphragm. The pillar prevents the diaphragm from being electrically connected to the backplate.

Abstract: A TCAM comprises a plurality of first search lines, a plurality of second search lines, a plurality of memory cell strings and one or more current sensing units. The memory cell strings comprise a plurality of memory cells. The current sensing units are coupled to the memory cell strings. In a search operation, a determination that whether any of the data stored in the memory cell strings matches a data string to be searched is made according to whether the one or more current sensing units detect current from the memory cell strings, or according to the magnitude of the current flowing out from the memory cell strings detected by the one or more current sensing units. Each memory cell includes a first transistor, a second transistor and an inverter. The first search line is coupled to the second search line by the inverter.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate. The opening portion of the substrate is under the diaphragm, and an air gap is formed between the diaphragm and the backplate. The MEMS structure further includes a pillar structure connected with the backplate and the diaphragm and a protection post structure extending from the backplate into the air gap. From a top view of the backplate, the protection post structure surrounds the pillar structure.

Abstract: A hybrid type content addressable memory for implementing in-memory-search and an operation method thereof are provided. The CAM includes a plurality of CAM strings and at least one sense amplifier circuit. Each of the CAM strings includes a plurality of CAM cells. The CAM cells store a plurality of existing data. The sense amplifier circuit is connected to the CAM strings. A plurality of search data are inputted to the CAM strings. A plurality of cell matching results obtained from the CAM cells in each of the CAM strings are integrated via an AND operation to obtain a string matching result. The string matching results obtained from the CAM strings are integrated via an OR operation.

Abstract: Embodiments of the present invention may encompass electronics assemblies of computer peripheral devices. The assemblies may include a mechanical support layer. The assemblies may include a membrane layer coupled with the mechanical support layer. The membrane layer may include a printed trace on at least one surface of the membrane layer. The assemblies may include an electrical contact that is coupled with the mechanical support layer and that sandwiches the membrane layer between the mechanical support layer and the electrical contact. The electrical contact may be electrically coupled with the printed trace.

Abstract: Embodiments of the present invention may encompass electronics assemblies of computer peripheral devices. The assemblies may include an outer top case. The assemblies may include a mechanical support layer disposed on an inner side of the outer top case. The assemblies may include a membrane layer coupled with the mechanical support layer. The membrane layer may include a printed trace on at least one surface of the membrane layer. The assemblies may include a ground plane positioned on an opposite side of the membrane layer as the outer top case such that the mechanical support layer and the membrane layer are disposed between the outer top case and the ground plane.

Abstract: A system for verifying edited image includes: a producer terminal device configured to tile a source image for a plurality of smaller tiled images with individual source image hash values to accordingly calculate an integrated source image hash value, and to execute digitally signing to generate an image tag pair; an editor terminal device configured to receive the image tag pair, to divide the source image into these smaller tiled images according to a tile configuration, to edit part of the smaller tiled images, to include the rest part of these smaller tiled images to generate an edited integral image and further calculate an integrated edit image hash value, and to execute digitally signing to generate a zero-knowledge proof (ZKP) assurance; and, a user terminal device configured to receive the ZKP assurance to accordingly verify whether or not the edited integral image is generated by editing the source image.

Abstract: Protection of a kernel from a sniff and code reuse attack. A kernel mode page table in initialized in a kernel. The kernel page entries in the kernel mode page table are set from s-pages to u-pages. Supervisor mode access prevention is enabled in the u-pages. Code contained in the kernel page entries in the u-pages is executed, the kernel page entries in the u-pages are capable of execution but are not capable of being accessed and read directly.

Abstract: The present disclosure provides a privacy computing method based on homomorphic encryption, which includes steps as follows. The ciphertext data is received, where the ciphertext data has a floating-point homomorphic encryption data structure, and the floating-point homomorphic encryption data structure of the ciphertext data includes the ciphertext mantissa, exponent parameter and gain parameter. The gain parameter sets the precision of the floating point corresponding to the ciphertext mantissa. The exponent parameter is adapted to multiplication or division. The artificial intelligence model performs operations on the ciphertext data to return the ciphertext result.