Patents by Inventor Feng-Hsu Fan

Feng-Hsu Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9130114
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: September 8, 2015
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 8921204
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: December 30, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Publication number: 20140339496
    Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Inventors: Chen-FU Chu, Hao-Chun Cheng, Feng-Hsu Fan, Wen-Huang Liu, Chao-Chen Cheng, David Trung Doan, Yang Po Wen
  • Patent number: 8871547
    Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: October 28, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Wen-Huang Liu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Trung Tri Doan
  • Patent number: 8802469
    Abstract: A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: August 12, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Trung Tri Doan, Hao-Chun Cheng, Feng-Hsu Fan, Fu-Hsien Wang
  • Patent number: 8778780
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: July 15, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung-Tri Doan, Chen-Fu Chu, Hao-Chun Cheng, Feng-Hsu Fan
  • Publication number: 20140154821
    Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 5, 2014
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: CHEN-FU CHU, WEN-HUANG LIU, JIUNN-YI CHU, CHAO-CHEN CHENG, HAO-CHUN CHENG, FENG-HSU FAN, Trung Tri Doan
  • Publication number: 20140151630
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed.
    Type: Application
    Filed: December 4, 2012
    Publication date: June 5, 2014
    Inventors: Feng-Hsu Fan, Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Jui-Kang Yen
  • Patent number: 8723160
    Abstract: A light emitting diode (LED) die includes a first-type semiconductor layer, a multiple quantum well (MQW) layer and a second-type semiconductor layer. The light emitting diode (LED) die also includes a peripheral electrode on the first-type semiconductor layer located proximate to an outer periphery of the first-type semiconductor layer configured to spread current across the first-type semiconductor layer. A method for fabricating the light emitting diode (LED) die includes the step of forming an electrode on the outer periphery of the first-type semiconductor layer at least partially enclosing and spaced from the multiple quantum well (MQW) layer configured to spread current across the first-type semiconductor layer.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: May 13, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Feng-Hsu Fan, Hao-Chun Cheng, Trung Tri Doan
  • Patent number: 8716041
    Abstract: A method for fabricating a light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 6, 2014
    Assignee: SemiLEDS Optoelectrics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu, Wen-Huang Liu, Feng-Hsu Fan, Hao-Chun Cheng, Fu-Hsien Wang
  • Patent number: 8703515
    Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: April 22, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Patent number: 8685764
    Abstract: Techniques for fabricating contacts on inverted configuration surfaces of GaN layers of semiconductor devices are provided. An n-doped GaN layer may be formed with a surface exposed by removing a substrate on which the n-doped GaN layer was formed. The crystal structure of such a surface may have a significantly different configuration than the surface of an as-deposited p-doped GaN layer.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: April 1, 2014
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Chen-Fu Chu, Wen-Huang Liu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Trung Tri Doan
  • Publication number: 20140048766
    Abstract: A method for fabricating light emitting diode (LED) dice includes the step of forming a light emitting diode (LED) die having a multiple quantum well (MQW) layer configured to emit electromagnetic radiation, and a confinement layer on the multiple quantum well (MQW) layer having a wire bond pad. The method also includes the steps of forming a dam on the wire bond pad configured to protect a wire bond area on the wire bond pad, forming an adhesive layer on the confinement layer and the wire bond pad with the dam protecting the wire bond area, and forming a wavelength conversion layer on the adhesive layer. A light emitting diode (LED) die includes the dam on the wire bond pad, the adhesive layer on the confinement layer and the wavelength conversion layer on the adhesive layer configured to convert the electromagnetic radiation to a second spectral region.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 20, 2014
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Chen-Fu CHU, Feng-Hsu FAN
  • Publication number: 20140051197
    Abstract: A method for fabricating a vertical light emitting diode (VLED) die includes the steps of: providing a substrate; forming an epitaxial structure on the substrate; forming an electrically insulative insulation layer covering the lateral surfaces of the epitaxial structure; forming an electrically non-conductive material on the electrically insulative insulation layer; and forming a mirror on the p-doped layer, with the electrically insulative insulation layer configured to protect the epitaxial structure during formation of the mirror.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 20, 2014
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: FENG-HSU FAN, Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Jui-Kang Yen
  • Patent number: 8648370
    Abstract: The invention relates to a wafer-type light emitting device having a substrate, one or more light emitting semiconductors formed on the substrate, one or more frames provided over the one or more light emitting semiconductors, and one or more wavelength-converting layers applied on the one or more light emitting semiconductors and confined by the one or more frames, wherein the wafer-type light emitting device is diced into a plurality of separate light emitting units.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: February 11, 2014
    Assignee: Semileds Optoelectronics Co., Ltd.
    Inventors: Wen-Huang Liu, Yuan-Hsiao Chang, Hung-Jen Kao, Chung-Che Dan, Feng-Hsu Fan, Chen-Fu Chu
  • Patent number: 8614449
    Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non- (or low) thermally conductive and/or non- (or low) electrically conductive carrier substrate that has been removed.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: December 24, 2013
    Assignee: SemiLEDs Optoelectronics Co., Ltd.
    Inventors: Feng-Hsu Fan, Trung Tri Doan, Chuong Anh Tran, Chen-Fu Chu, Chao-Chen Cheng, Jiunn-Yi Chu, Wen-Huang Liu, Hao-Chun Cheng, Jui-Kang Yen
  • Publication number: 20130337590
    Abstract: A method for fabricating a light emitting diode includes the steps of providing a thermal conductive substrate having an electrical isolation layer, forming an anode via and a cathode via side by side on a first side of the substrate part way through the substrate, forming an anode through interconnect in the anode via and a cathode through interconnect in the cathode via, thinning the substrate from a second side of the substrate to the anode through interconnect and the cathode through interconnect, and mounting a LED chip to the first side in electrical communication with the cathode through interconnect and the anode through interconnect.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 19, 2013
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: TRUNG TRI DOAN, Chen-Fu Chu, Wen-Huang Liu, Feng-Hsu Fan, Hao-Chun Cheng, Fu-Hsien Wang
  • Publication number: 20130334982
    Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.
    Type: Application
    Filed: August 26, 2013
    Publication date: December 19, 2013
    Applicant: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: WEN-HUANG LIU, Chen-Fu Chu, Jiunn-Yi Chu, Chao-Chen Cheng, Hao-Chun Cheng, Feng-Hsu Fan, Yuan-Hsiao Chang
  • Publication number: 20130302926
    Abstract: A method for fabricating semiconductor dice includes the steps of providing a wafer assembly having a substrate and semiconductor structures on the substrate; and defining the semiconductor dice on the substrate. The method also includes the step of separating the substrate from the semiconductor structures by applying a first laser pulse to each semiconductor die on the substrate having first parameters selected to break an interface between the substrate and the semiconductor structures and then applying a second laser pulse to each semiconductor die on the substrate having second parameters selected to complete separation of the substrate from the semiconductor structures. The method can also include the steps of forming one or more intermediate structures between the semiconductor dice on the substrate configured to protect the semiconductor dice during the separating step.
    Type: Application
    Filed: July 8, 2013
    Publication date: November 14, 2013
    Inventors: Chen-Fu Chu, Hao-Chung Cheng, Trung Tri Doan, Feng-Hsu Fan
  • Patent number: 8552458
    Abstract: A light emitting diode includes a thermal conductive substrate having at least one electrical isolation layer configured to provide vertical electrical isolation and a heat transfer path through the substrate from a front side (first side) to a back side (second side) thereof. The light emitting diode includes an anode having a through interconnect, and a cathode having a through interconnect, which are arranged side by side on the substrate. The light emitting diode also includes a LED chip mounted to the substrate between the anode and the cathode.
    Type: Grant
    Filed: June 26, 2010
    Date of Patent: October 8, 2013
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Trung Tri Doan, Chen-Fu Chu, Wen-Huang Liu, Feng-Hsu Fan, Hao-Chun Cheng, Fu-Hsien Wang