Patents by Inventor Feng-I Liu

Feng-I Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8898517
    Abstract: An apparatus for handling a failed processor of a multiprocessor system including at least two processors interconnected by processor interconnects for facilitating transactions of the processors. The at least two processors include a first processor set as a default boot processor in response to a boot up operation of the multiprocessor computer, and a second processor. The apparatus includes: a baseboard management module for detecting and receiving health information of the processors; a multiplexer coupled to the baseboard management module and respectively to the processors, the multiplexer being operative to switch between the processors; and a processor ID controller coupled to the baseboard management module and respectively to the processors. In response to the health information indicating the first processor has failed, the processor ID controller sets the second processor as the default boot processor and the baseboard management module enables the multiplexer to switch to the second processor.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: November 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Yao-Chun Cheng, Yuan-Ning Lien, Chuan Yung Liu, Feng-I Liu, Kuei Huang Liu, Michael J. Peters
  • Patent number: 8892944
    Abstract: A method for handling a failed processor of a multiprocessor system, the multiprocessor system comprising at least two processors interconnected by processor interconnects for transactions between processors, the processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor system. The method comprises: detecting and receiving, via a baseboard management module, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management module and respectively to the at least two processors; and, in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management module, the multiplexer to switch to the second processor.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Yao-Chun Cheng, Yuan-Ning Lien, Chuan Yung Liu, Feng-I Liu, Kuei Huang Liu, Michael J. Peters
  • Publication number: 20120278653
    Abstract: A method for handling a failed processor of a multiprocessor system, the multiprocessor system comprising at least two processors interconnected by processor interconnects for transactions between processors, the processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor system. The method comprises: detecting and receiving, via a baseboard management module, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management module and respectively to the at least two processors; and, in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management module, the multiplexer to switch to the second processor.
    Type: Application
    Filed: July 3, 2012
    Publication date: November 1, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yao-Chun Cheng, Yuan-Ning Lien, Chuan Yung Liu, Feng-I Liu, Kuei Huang Liu, Michael J. Peters
  • Publication number: 20120173922
    Abstract: An apparatus for handling a failed processor of a multiprocessor system including at least two processors interconnected by processor interconnects for facilitating transactions of the processors. The at least two processors include a first processor set as a default boot processor in response to a boot up operation of the multiprocessor computer, and a second processor. The apparatus includes: a baseboard management module for detecting and receiving health information of the processors; a multiplexer coupled to the baseboard management module and respectively to the processors, the multiplexer being operative to switch between the processors; and a processor ID controller coupled to the baseboard management module and respectively to the processors. In response to the health information indicating the first processor has failed, the processor ID controller sets the second processor as the default boot processor and the baseboard management module enables the multiplexer to switch to the second processor.
    Type: Application
    Filed: December 2, 2011
    Publication date: July 5, 2012
    Applicant: International Business Machiness Corporation
    Inventors: Yao-Chun Cheng, Yuan-Ning Lien, Chuan Yung Liu, Feng-I Liu, Kuei Huang Liu, Michael J. Peters