Patents by Inventor Feng-Inn Wu
Feng-Inn Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230373062Abstract: A chemical mechanical polishing (CMP) apparatus includes a polishing pad located on a top surface of a platen configured to rotate around a vertical axis passing through the platen, a wafer carrier configured to hold a substrate and facing the polishing pad, and an integrated slurry mixer-dispenser including at least two inlet ports configured to receive a respective slurry component, configured to generate slurry by mixing at least two slurry components provided through the at least two inlet ports, and including a dispensation port configured to dispense the slurry over the polishing pad.Type: ApplicationFiled: May 23, 2022Publication date: November 23, 2023Inventors: Yu-Chen Wei, Feng-Inn Wu, You-Shiang Lin, Jiun Ru Huang, Jyun-Jie Wu
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Publication number: 20220355437Abstract: A method includes supplying slurry onto a polishing pad; holding a wafer against the polishing pad with a piezoelectric layer interposed vertically between a pressure unit and the wafer; exerting a force on the piezoelectric layer using the pressure unit to make the piezoelectric layer directly press the wafer; generating, using the piezoelectric layer, a first voltage corresponding to a first portion of the wafer and a second voltage corresponding to a second portion of the wafer; tuning the force exerted on the piezoelectric layer according to the first voltage and the second voltage; and polishing, using the polishing pad, the wafer.Type: ApplicationFiled: July 22, 2022Publication date: November 10, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shu-Bin HSU, Ren-Guei LIN, Feng-Inn WU, Sheng-Chen WANG, Jung-Yu LI
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Patent number: 11407083Abstract: A method includes supplying slurry onto a polishing pad. A wafer is held against the polishing pad with a first piezoelectric layer interposed between a pressure unit and the wafer. A first voltage generated by the first piezoelectric layer is detected. The wafer is pressed, using the pressure unit, against the polishing pad according to the detected first voltage generated by the first piezoelectric layer. The wafer is polished using the polishing pad.Type: GrantFiled: June 24, 2019Date of Patent: August 9, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shu-Bin Hsu, Ren-Guei Lin, Feng-Inn Wu, Sheng-Chen Wang, Jung-Yu Li
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Publication number: 20220102285Abstract: The current disclosure describes techniques for making an alignment mark on a wafer. A recess is etched in a first surface region of a wafer. A device structure is formed in a second surface region of the wafer. A dielectric layer is deposited on the first surface of the wafer and filling the recess. A first planarization procedure is conducted to planarize the dielectric layer. After the first planarization procedure, a second planarization procedure is conducted to device structures on the second surface region of the wafer.Type: ApplicationFiled: July 7, 2021Publication date: March 31, 2022Inventors: Huang-Jen HSU, Jheng-Si SU, Kun-Ming LIU, Tzi-Yi SHIEH, Feng-Inn WU
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Publication number: 20210407819Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure is formed over a substrate. The sacrificial gate structure includes a sacrificial gate electrode. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed while a lower portion of the sacrificial gate structure is embedded in the first dielectric layer. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The sacrificial gate electrode is removed.Type: ApplicationFiled: January 29, 2021Publication date: December 30, 2021Inventors: Yu-Chen Wei, Feng-Inn WU, Tzi-Yi SHIEH
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Publication number: 20190308295Abstract: A method includes supplying slurry onto a polishing pad. A wafer is held against the polishing pad with a first piezoelectric layer interposed between a pressure unit and the wafer. A first voltage generated by the first piezoelectric layer is detected. The wafer is pressed, using the pressure unit, against the polishing pad according to the detected first voltage generated by the first piezoelectric layer. The wafer is polished using the polishing pad.Type: ApplicationFiled: June 24, 2019Publication date: October 10, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shu-Bin HSU, Ren-Guei LIN, Feng-Inn WU, Sheng-Chen WANG, Jung-Yu LI
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Patent number: 10328549Abstract: A polishing head includes a carrier head and a plurality of pressure units arranged on the carrier head. At least two of the pressure units are located on the same circumferential line relative to a center axis of the carrier head.Type: GrantFiled: December 11, 2013Date of Patent: June 25, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shu-Bin Hsu, Ren-Guei Lin, Feng-Inn Wu, Sheng-Chen Wang, Jung-Yu Li
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Patent number: 9908213Abstract: A method of using a chemical mechanical polishing (CMP)apparatus that includes a apparatus is provided. The method includes providing a conditioning disc for conditioning the polishing pad, where the conditioning disc includes a plurality of portions of subsystem discs. The portions may be regions of the disc that are concentric. Each portion of the disc is operable to rotate at a different angular velocity. In some embodiments, a different applied loading is provided to each of the portions of the disc in addition to or in lieu of the different angular velocities.Type: GrantFiled: October 5, 2015Date of Patent: March 6, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsiu-Ming Yeh, Feng-Inn Wu
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Patent number: 9768080Abstract: A semiconductor manufacturing method includes several operations. One operation is catching an image of a predetermined location on a surface of a pad installed in a chemical mechanical polishing (CMP) apparatus by a surface detector. One operation is transferring the image of the predetermined location to a processor. One operation is calculating a surface roughness value of the predetermined location from the image. One operation is comparing the surface roughness value with a threshold value by the processor to determine if the surface roughness condition at the predetermined location is smaller than the threshold value, and the surface is configured for polishing a to-be-polished surface of a wafer.Type: GrantFiled: December 18, 2013Date of Patent: September 19, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDInventors: Jia-Jhen Chen, Sheng-Chen Wang, Feng-Inn Wu
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Patent number: 9481069Abstract: A chemical mechanical polishing apparatus includes a platen, a polishing head, a magnetizable polishing pad, and an electromagnetic component. The magnetizable polishing pad is disposed between the polishing head and the platen. The electromagnetic component is configured for fastening the magnetizable polishing pad on the platen.Type: GrantFiled: November 6, 2013Date of Patent: November 1, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yuan-Hsuan Chen, Sheng-Chen Wang, Feng-Inn Wu
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Patent number: 9418904Abstract: To provide improved planarization, techniques in accordance with this disclosure include a CMP station that utilizes localized planarization on a wafer. This localized planarization, which is often carried out in a localized planarization station downstream of a CMP station, applies localized planarization to less than the entire face of the wafer to correct localized non-planar features. Other systems and methods are also disclosed.Type: GrantFiled: November 14, 2011Date of Patent: August 16, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Chen Wang, Feng-Inn Wu
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Publication number: 20160023324Abstract: A chemical mechanical polishing (CMP) apparatus is provided that includes a conditioning disc for conditioning a polishing pad of the CMP apparatus. The conditioning disc includes a plurality of portions of subsystem discs. The portions may be regions of the disc that are concentric. Each portion of the disc is operable to rotate at a different angular velocity. In some embodiments, a different applied loading is provided to each of the portions of the disc in addition to or in lieu of the different angular velocities.Type: ApplicationFiled: October 5, 2015Publication date: January 28, 2016Inventors: Hsiu-Ming Yeh, Feng-Inn Wu
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Patent number: 9149906Abstract: A chemical mechanical polishing (CMP) apparatus is provided that includes a conditioning disc for conditioning a polishing pad of the CMP apparatus. The conditioning disc includes a plurality of portions of subsystem discs. The portions may be regions of the disc that are concentric. Each portion of the disc is operable to rotate at a different angular velocity. In some embodiments, a different applied loading is provided to each of the portions of the disc in addition to or in lieu of the different angular velocities.Type: GrantFiled: September 7, 2011Date of Patent: October 6, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsiu-Ming Yeh, Feng-Inn Wu
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Publication number: 20150170978Abstract: A semiconductor manufacturing method includes several operations. One operation is catching an image of a predetermined location on a surface of a pad installed in a chemical mechanical polishing (CMP) apparatus by a surface detector. One operation is transferring the image of the predetermined location to a processor. One operation is calculating a surface roughness value of the predetermined location from the image. One operation is comparing the surface roughness value with a threshold value by the processor to determine if the surface roughness condition at the predetermined location is smaller than the threshold value, and the surface is configured for polishing a to-be-polished surface of a wafer.Type: ApplicationFiled: December 18, 2013Publication date: June 18, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDInventors: JIA-JHEN CHEN, SHENG-CHEN WANG, FENG-INN WU
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Publication number: 20150158140Abstract: A polishing head includes a carrier head and a plurality of pressure units arranged on the carrier head. At least two of the pressure units are located on the same circumferential line relative to a center axis of the carrier head.Type: ApplicationFiled: December 11, 2013Publication date: June 11, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shu-Bin HSU, Ren-Guei LIN, Feng-Inn WU, Sheng-Chen WANG, Jung-Yu LI
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Publication number: 20150126095Abstract: A chemical mechanical polishing apparatus includes a platen, a polishing head, a magnetizable polishing pad, and an electromagnetic component. The magnetizable polishing pad is disposed between the polishing head and the platen. The electromagnetic component is configured for fastening the magnetizable polishing pad on the platen.Type: ApplicationFiled: November 6, 2013Publication date: May 7, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yuan-Hsuan CHEN, Sheng-Chen WANG, Feng-Inn WU
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Patent number: 8992287Abstract: The present disclosure relates to a slurry distribution system having a distribution tube connected between a mixing tank and a CMP tool. The mixing tank is configured to generate a polishing mixture comprising a diluted slurry having abrasive particles that enable mechanical polishing of a workpiece. The polishing mixture is transported between the mixing tank and a CMP tool by way of a transport piping. An energy source, in communication with the transport piping, transfers energy to the abrasive particles within the polishing mixture, thereby preventing accumulation of the abrasive particles within the transport piping.Type: GrantFiled: December 1, 2011Date of Patent: March 31, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Chen Wang, Feng-Inn Wu, Chih-Hung Tsai, Huang-Jen Hsu, Te-Chia Hsu
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Patent number: 8939815Abstract: A system includes a chuck with a retaining ring on a first surface thereof. The first surface and the retaining ring are both circular, the retaining ring having a first inner circumference. The system also includes a platen with a second surface, and the second surface faces the first surface and is operable to move with the first surface. The system further includes an air zone circumscribed by the first inner circumference that provides an effective inner circumference different from the first inner circumference.Type: GrantFiled: February 21, 2011Date of Patent: January 27, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hui-Ting Tsai, Feng-Inn Wu
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Publication number: 20130143474Abstract: The present disclosure relates to a slurry distribution system having a distribution tube connected between a mixing tank and a CMP tool. The mixing tank is configured to generate a polishing mixture comprising a diluted slurry having abrasive particles that enable mechanical polishing of a workpiece. The polishing mixture is transported between the mixing tank and a CMP tool by way of a transport piping. An energy source, in communication with the transport piping, transfers energy to the abrasive particles within the polishing mixture, thereby preventing accumulation of the abrasive particles within the transport piping.Type: ApplicationFiled: December 1, 2011Publication date: June 6, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Chen Wang, Feng-Inn Wu, Chih-Hung Tsai, Haung-Jen Hsu, Te-Chia Hsu
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Publication number: 20130122613Abstract: To provide improved planarization, techniques in accordance with this disclosure include a CMP station that utilizes localized planarization on a wafer. This localized planarization, which is often carried out in a localized planarization station downstream of a CMP station, applies localized planarization to less than the entire face of the wafer to correct localized non-planar features. Other systems and methods are also disclosed.Type: ApplicationFiled: November 14, 2011Publication date: May 16, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Chen Wang, Feng-Inn Wu