Patents by Inventor Feng Liao

Feng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240413221
    Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.
    Type: Application
    Filed: July 11, 2024
    Publication date: December 12, 2024
    Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen
  • Patent number: 12158675
    Abstract: A display device includes a backlight module and a display panel. The display panel is disposed on the backlight module and includes two substrates, a sensor, and a light-shielding element. The sensor is disposed between the two substrates. The light-shielding element at least partially surrounds the sensor. A height of the light-shielding element is greater than a height of the sensor.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: December 3, 2024
    Assignee: Innolux Corporation
    Inventors: Hsiao Feng Liao, Shu-Fen Li, Chuan-Chi Chien, Po-Yang Chen, I-An Yao
  • Patent number: 12159894
    Abstract: A display device includes a substrate, a photosensitive element formed above the substrate, a signal line formed above the substrate, and a transparent conductive member electrically connected to the signal line and the photosensitive element. In a normal direction of the substrate, the signal line does not overlap with the photosensitive element.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: December 3, 2024
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Feng Liao, Shu-Fen Li, Chuan-Chi Chien, I-An Yao
  • Publication number: 20240395562
    Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20240391049
    Abstract: A planarization tool is configured to monitor and analyze the condition of a polishing pad over the life of the polishing pad. A piezoelectric pad monitoring device may be mounted to a polishing head of the planarization tool in place of a semiconductor wafer. The piezoelectric pad monitoring device may be pressed against the polishing pad. When pressed against the polishing pad, the piezoelectric pad monitoring device may generate a signal based on a quantity of pad contacts, on the polishing pad, that are in contact with the piezoelectric pad monitoring device. The signal may be provided to a processor of the planarization tool so that the processor may generate, based on the signal, a map of the pad contacts on the polishing pad. The processor may use the map of the pad contacts to determine properties of the polishing pad such as roughness and/or uniformity, among other examples.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 28, 2024
    Inventors: Yi-Cheng LIN, Kao-Feng LIAO, Peng-Chung JANGJIAN
  • Publication number: 20240395705
    Abstract: The semiconductor device includes a substrate, a stack disposed on the substrate, a first common source line and a second common source line disposed in the stack and connected to the substrate. The stack includes insulating layers and conductive layers alternately arranged. The first common source line and the second common source line are extended along a first direction and are arranged in a second direction that is perpendicular to the first direction. The first common source line includes a first segment and a second segment spaced apart by a first common source line cut. The second common source line includes a third segment and a fourth segment spaced apart by a second common source line cut. The first common source line cut is shifted relative to the second common source line cut in the first direction. A method of forming the semiconductor device is also disclosed.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 28, 2024
    Inventors: Ting-Feng LIAO, Mao-Yuan WENG, Kuang-Wen LIU
  • Patent number: 12154964
    Abstract: A semiconductor device includes an interface layer on a substrate, a gate dielectric layer on the interface layer, and a work function metal layer on the gate dielectric layer. An interface between the interface layer and the gate dielectric layer has a concentration of a dipole-inducing element. The semiconductor device also includes an oxygen blocking layer on the work function metal layer and a metal fill layer on the oxygen blocking layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Hung Tai, Yung-Hsiang Chan, Shan-Mei Liao, Hsin-Han Tsai, Jian-Hao Chen, Kuo-Feng Yu
  • Patent number: 12155040
    Abstract: A standing device for letting a battery cell stand includes: a pressure regulating apparatus; a standing cavity; a charging cavity, connected to a first end of the standing cavity, the charging cavity being connected to the pressure regulating apparatus; a conveying apparatus, penetratingly disposed in the standing cavity and the charging cavity and configured to convey the battery cell; and a charging cavity sealing gate, disposed between the charging cavity and the standing cavity, the charging cavity sealing gate being configured to be opened when the pressure in the charging cavity rises to the pressure in the standing cavity, so that the battery cell is conveyed to the standing cavity.
    Type: Grant
    Filed: March 22, 2024
    Date of Patent: November 26, 2024
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventors: Feng Guan, Hongyan Liao, Zhihui Wang, Fenggang Zhao, Jun Ni
  • Publication number: 20240387277
    Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Wen-Hung Huang, Kuo-Feng Yu, Jian-Hao Chen, Shan-Mei Liao, Jer-Fu Wang, Yung-Hsiang Chan
  • Publication number: 20240382728
    Abstract: The present invention relates to a layered material for mucoadhesion, comprising a modified acrylic polymer and hydroxypropyl methylcellulose, wherein the weight ratio of the modified acrylic polymer: hydroxypropyl methylcellulose is 1:4 to 4:1, and the layered material has a thickness of 0.0001 millimeters to 100 millimeters. The layered material of the present invention has mucoadhesion ability, so it can be prepared into a patch or a needle patch and help the fixation of the patch or the needle patch, and this is advantageous for the controlled-release of drugs. The present invention also relates to a patch comprising the layered material. In addition, the present invention relates to a microneedle patch comprising a needle layer, a base layer and a backing layer, wherein the backing layer comprises the aforementioned layered material and benefits the fixation of the microneedle patch. This microneedle patch is suitable for lesions on mucosa.
    Type: Application
    Filed: September 11, 2023
    Publication date: November 21, 2024
    Inventors: My-Huyen NGUYEN, Hsiu-Feng YEH, Hsiao-Chun CHOU, Jie-Wei HSU, Yi-Jyun LIAO, Hsin-Kuo CHANG, Ta-Jo LIU
  • Publication number: 20240387639
    Abstract: A semiconductor structure includes a stack of nanostructures, an interfacial layer wrapping around each nanostructure of the stack of nanostructures, a first gate dielectric layer wrapping around the interfacial layer and each nanostructure of the stack of nanostructures, and a gate electrode layer disposed over the first gate dielectric layer. The first gate dielectric layer includes a dipole element. A first concentration of the dipole element at a center line of the first gate dielectric layer is greater than a second concentration of the dipole element at a boundary surface of the first gate dielectric layer interfacing the interfacial layer.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Shan-Mei Liao, Yung-Hsiang Chan, Yao-Teng Chuang, Jian-Hao Chen, Kuo-Feng Yu
  • Publication number: 20240387682
    Abstract: A method of forming a semiconductor device includes removing a dummy gate structure to expose a channel region, depositing an interface layer on the channel region, depositing a gate dielectric layer on the interface layer, and forming a doping layer on the gate dielectric layer. The doping layer includes a dipole-inducing element. The method also includes annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer, removing the doping layer, forming a work function metal layer on the gate dielectric layer, depositing an oxygen blocking layer on the work function metal layer, and forming a gate metal fill layer on the oxygen blocking layer.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: An-Hung Tai, Yung-Hsiang Chan, Shan-Mei Liao, Hsin-Han Tsai, Jian-Hao Chen, Kuo-Feng Yu
  • Publication number: 20240381608
    Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 12140623
    Abstract: A testing apparatus includes a circuit board, a probe station and a probe array. The circuit board includes a plurality of contacts. The probe station includes a platform located on the circuit board and used for carrying a device under test (DUT), and a plurality of probe holes formed on the platform and arranged in an array. The probe array includes a plurality of telescopic probes respectively linearly inserted into the probe holes. One end of each of the telescopic probes is contacted with one of the contacts, and the other end thereof is contacted with one of solder balls of the DUT. Each of the probe holes includes an elongated groove penetrating through the platform. Each of the telescopic probes is provided with a fin protruding outwardly and inserting into the elongated groove.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: November 12, 2024
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chieh Liao, Yu-Min Sun, Chih-Feng Cheng
  • Patent number: 12140584
    Abstract: A method for evaluating a production potential for volume fracturing of a shale oil reservoir and determining a soaking time is discloses. The method may comprise: obtaining a core column; performing a saturated oil treatment on the core column; obtaining an initial fracture porosity parameter of the saturated oil-treated core column; soaking the core column after a CT scanning into a fracturing fluid to test the core mass increase amount at different immersion durations; obtaining the fracture porosity increase amount of the core column at different soaking times, and calculating a weight of newly added fracture porosity-fillable fracturing fluid; generating a curve of the core mass increase amount and a curve of the weight of the newly added fracture porosity-fillable fracturing fluid at different immersion durations; comparing a mass increase amount per volume unit of a core, and ranking a e mass increase amount per volume unit of the core to determine the production increase potential.
    Type: Grant
    Filed: June 5, 2024
    Date of Patent: November 12, 2024
    Assignee: YANGTZE UNIVERSITY
    Inventors: Wenjun Xu, Feng Jiang, Jianpeng Zhang, Lei Wang, Yuanai Liao
  • Patent number: 12142640
    Abstract: A method includes receiving a workpiece having a first stack of semiconductor layers in a first region and a second stack of semiconductor layers in a second region; forming a first gate dielectric layer surrounding each layer of the first stack and a second gate dielectric layer surrounding each layer of the second stack; forming a first dipole layer surrounding the first gate dielectric layer and merging between vertically adjacent portions of the first gate dielectric layer, and a second dipole layer surrounding the second gate dielectric layer and merging between vertically adjacent portions of the second gate dielectric layer; removing the first dipole layer; after the removing of the first dipole layer, conducting a first annealing on the workpiece; removing a remaining portion of the second dipole layer; and forming a gate electrode layer in the first region and the second region.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: November 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shan-Mei Liao, Yung-Hsiang Chan, Yao-Teng Chuang, Jian-Hao Chen, Kuo-Feng Yu
  • Patent number: 12127103
    Abstract: A circuit arrangement includes a preprocessing circuit configured to obtain context information related to a user location, a learning circuit configured to determine a predicted user movement based on context information related to a user location to obtain a predicted route and to determine predicted radio conditions along the predicted route, and a decision circuit configured to, based on the predicted radio conditions, identify one or more first areas expected to have a first type of radio conditions and one or more second areas expected to have a second type of radio conditions different from the first type of radio conditions and to control radio activity while traveling on the predicted route according to the one or more first areas and the one or more second areas.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: October 22, 2024
    Assignee: Intel Corporation
    Inventors: Shahrnaz Azizi, Biljana Badic, John Browne, Dave Cavalcanti, Hyung-Nam Choi, Thorsten Clevorn, Ajay Gupta, Maruti Gupta Hyde, Ralph Hasholzner, Nageen Himayat, Simon Hunt, Ingolf Karls, Thomas Kenney, Yiting Liao, Christopher MacNamara, Marta Martinez Tarradell, Markus Dominik Mueck, Venkatesan Nallampatti Ekambaram, Niall Power, Bernhard Raaf, Reinhold Schneider, Ashish Singh, Sarabjot Singh, Srikathyayani Srikanteswara, Shilpa Talwar, Feng Xue, Zhibin Yu, Robert Zaus, Stefan Franz, Uwe Kliemann, Christian Drewes, Juergen Kreuchauf
  • Publication number: 20240344280
    Abstract: A segmental precast composite-material composite-slab composite beam and a construction method thereof are provided, relating to the technical field of bridge design and construction. The segmental precast composite-material composite-slab composite beam mainly includes a segmental precast orthotropic composite top slab, a web, a bottom slab, and a wet joint between segments. The orthotropic composite top slab is composed of an orthotropic slab and an ultra-high-performance concrete layer (UHPC), and the interface connection of the orthotropic slab and the UHPC structural layer is achieved by a shear key. The UHPC structural layer is superposed with the orthotropic slab in segments in a precast plant to form a composite-slab composite beam segment to be entirely transported, hoisted and assembled, and the connection of the UHPC structural layers between the segments is achieved by casting a transverse wet joint in place.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 17, 2024
    Inventors: Jianhui ZHAN, Yan YANG, Yuan LIAO, Zhi FANG, Zhixiong LAN, Ying CHANG, Wangxing DING, Feng SHEN, Zhaohui LIU, Shoufeng TANG, Ming ZHANG, Xingyu TAN, Jinxia ZHAO, Shan PEI, Jing LIU, Zuowei QIN, Bo YAO, Wuzhou HU, Qifen WEI, Xingzhi CHEN, Xiaoqing LIU, Chenliang TAO, Wei JIANG
  • Patent number: 12119416
    Abstract: According to the embodiments provided herein, a photovoltaic device can include a buffer layer adjacent to an absorber layer doped p-type with a group V dopant. The buffer layer can have a plurality of layers compatible with group V dopants.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: October 15, 2024
    Assignee: First Solar, Inc.
    Inventors: Le Chen, Sachit Grover, Jason Kephart, Sergei Kniajanski, Chungho Lee, Xiaoping Li, Feng Liao, Dingyuan Lu, Rajni Mallick, Wenming Wang, Gang Xiong, Wei Zhang
  • Publication number: 20240340365
    Abstract: The rotation shaft structure includes a main shaft assembly, and two folding assemblies that are symmetrically disposed with respect to the main shaft assembly. The two folding assemblies may rotate toward or against each other relative to the main shaft assembly. When the folding assembly is specifically disposed, the folding assembly includes a rotation assembly, a support plate, and a housing mounting bracket. The rotation assembly is rotationally connected to the main shaft assembly. The support plate is rotationally connected to the housing mounting bracket and slidably connected to the rotation assembly.
    Type: Application
    Filed: June 18, 2024
    Publication date: October 10, 2024
    Inventors: Changliang LIAO, Weifeng WU, Li LIAO, Kenji NAGAI, Ding ZHONG, Qiao DENG, Tao HUANG, Qiang ZHAN, Haiqiang TIAN, Yuehua HU, Feng ZHAO, Gang WANG, Bo HUANG, Zhixiao XU, Shangyun WANG