Patents by Inventor Feng Liao
Feng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250065557Abstract: A release protection film and a method for manufacturing the same are provided. The method includes: preparing a resin material; subjecting the resin material to an extrusion process and a stretching process, so as to form a resin membrane; and forming an embossed pattern having a depth of from 1 ?m to 5 ?m onto the resin membrane by an embossing roller, so as to form the release protection film. The resin material includes a polyolefin material and a petroleum resin. Based on a total weight of the polyolefin material being 100 phr, an amount of the petroleum resin ranges from 5 phr to 20 phr.Type: ApplicationFiled: October 29, 2023Publication date: February 27, 2025Inventors: TE-CHAO LIAO, CHING-YAO YUAN, Chih-Feng Wang, TENG-KO MA
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Publication number: 20250058620Abstract: A clutch assembly includes a first transmission member, a first clutch component, and a second clutch component. The first clutch component includes a first clutch portion and a second clutch portion, and the second clutch component includes a third clutch portion and a fourth clutch portion. The first clutch portion and the third clutch portion are connected to the first transmission member to enable the first transmission member to form a first end of the clutch assembly. The second clutch portion is selectively engaged with the first clutch portion to enable the second clutch portion to form a second end of the clutch assembly. The fourth clutch portion is selectively engaged with the third clutch portion to enable the fourth clutch portion to form a third end of the clutch assembly.Type: ApplicationFiled: November 6, 2024Publication date: February 20, 2025Inventors: Feng ZHANG, Gaoming ZHAO, Yinsheng LIAO, Ning ZHU, Qiang WANG
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Publication number: 20250051901Abstract: A method for the surface treatment of a corrosion-resistant nickel-based alloy and the resulting surface structure of the treated alloy is disclosed. The method includes immersing a nickel-based alloy in a first neutral or alkaline solution to remove surface contaminants, followed by immersing the cleaned alloy in a second neutral or alkaline solution to form functional groups on its surface. Subsequently, a low-temperature heat treatment is performed to form a passivation layer on the surface of the nickel-based alloy. The passivation layer has a surface roughness of less than 0.04 microns and a thickness ranging from 5 nanometers to 200 nanometers. The resulting corrosion-resistant nickel-based alloy comprises a substrate made of the nickel-based alloy and a passivation layer established on at least one surface of the substrate. The nickel content of the alloy is greater than 50%, and the alloy may also contain additional metallic components such as chromium (Cr) and manganese (Mn).Type: ApplicationFiled: April 3, 2024Publication date: February 13, 2025Inventors: Tsung Feng Wu, Chun-Chih Liao, Po-Chia Huang, Guo-Yang Ciou, Chia-Te Lin, Po-Han Chen
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Publication number: 20250053049Abstract: An electronic device comprises a substrate, a semiconductor element disposed on the substrate and comprising a top surface, a bottom surface and a side surface connected between the top surface and the bottom surface, and a shielding element comprising a first portion, a second portion and a third portion. The first portion is disposed between the bottom surface of the semiconductor layer and the substrate, the second portion surrounds the side surface of the semiconductor element, and the semiconductor element is disposed between the first portion and the third portion.Type: ApplicationFiled: October 29, 2024Publication date: February 13, 2025Applicant: Innolux CorporationInventors: Hsiao Feng Liao, Shu-Fen Li, Chuan-Chi Chien, Po-Yang Chen, I-An Yao
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Patent number: 12213762Abstract: A sole data collection device and a sole data collection method are disclosed. The sole data collection device includes an image capture module, a temperature detection module and a monofilament testing module. The sole data collection device is used for collecting the sole data of a user, and the sole data is transmitted to a cloud server. The sole data collection device and the sole data collection method are not only convenient for a user to collect sole data at home at any time, but also allow the user's caregiver and/or relevant medical care personnel to extract the sole data from the cloud server to screen the user's plantar condition, so as to solve the problem that it is time-consuming and costly to go to a medical institution for relevant examinations.Type: GrantFiled: March 30, 2023Date of Patent: February 4, 2025Assignee: Chang Gung UniversityInventors: Ting-Ting Yeh, Miao-Yu Liao, Chia-Chih Chang, Yu-Syuan Chen, I-Feng Hsu
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Publication number: 20250033457Abstract: A powertrain system includes a conversion device, a first motor, a second motor, and an engine. At least one of the first motor and the engine is configured to selectively output power to a first traveling end by means of the conversion device; the engine is configured to selectively output the power to the first motor by means of the conversion device, to drive the first motor to generate electricity; and the second motor is in driving connection with the engine, so that the powertrain system has a first simultaneous driving and electricity-generating mode. In the first simultaneous driving and electricity-generating mode, the first motor outputs the power to the first traveling end by means of the conversion device; and the second motor, driven by the engine, generates electricity.Type: ApplicationFiled: October 14, 2024Publication date: January 30, 2025Inventors: Yinsheng LIAO, Feng ZHANG, Gaoming ZHAO, Yongtian ZHU, Ning ZHU
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Publication number: 20250033855Abstract: A chip storing device includes a supporting frame, an elastic airbag and an airtight container. The supporting frame includes a loading tray having a receiving slot and a positioning portion. The receiving slot is used for containing a packaged chip. The positioning portion is disposed within the receiving slot, and used for limiting the elastic airbag. The airtight container is formed with an accommodating space therein. The supporting frame and the elastic air bag are completely received within the accommodation space. when the accommodation space is evacuated to be in a negative pressure environment, the volume of the elastic airbag is increased in the negative pressure environment, so that the elastic airbag that is inflated directly abuts against the packaged chip within the receiving slot.Type: ApplicationFiled: August 28, 2023Publication date: January 30, 2025Inventors: Chih-Chieh LIAO, Yu-Min SUN, Chih-Feng CHENG
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Publication number: 20250026029Abstract: An element pickup mechanism includes a pick-up arm and an elastic gasket. The pick-up arm includes a bracket, an air-extraction pipe and a suction cup. The bracket is provided with an inner space and an opening that is formed on one side of the bracket and in communication with the inner space. The air-extraction pipe is disposed on the bracket and connected to a vacuum pump equipment. The suction cup is sleeved on one end of the air-extraction pipe, located in the inner space and faced towards the opening of the bracket. The elastic gasket includes a flexible pad and a through hole. The flexible pad is formed with a flat surface and an attached surface that is fixedly attached to the side of the bracket. The through hole penetrates through the flexible pad to coaxially align with the opening and the suction cup.Type: ApplicationFiled: September 10, 2023Publication date: January 23, 2025Inventors: Chih-Chieh LIAO, Yu-Min SUN, Chih-Feng CHENG
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Publication number: 20250021265Abstract: The present disclosure provides a storage control method, including: sending a command acquisition request for at least one first queue, where the at least one first queue is a queue among a plurality of queues which accumulates at least one queue request message, and a command acquisition request for each first queue of the at least one first queue corresponds to all accumulated queue request messages of the first queue; and receiving a storage command for each first queue in the at least one first queue.Type: ApplicationFiled: November 24, 2022Publication date: January 16, 2025Inventors: Shuzhou DAI, Lin YAN, Qiangjun LIU, Jun WANG, Zhijia LIAO, Feng YU
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Patent number: 12172263Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.Type: GrantFiled: May 5, 2023Date of Patent: December 24, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Michael Yen, Kao-Feng Liao, Hsin-Ying Ho, Chun-Wen Hsiao, Sheng-Chao Chuang, Ting-Hsun Chang, Fu-Ming Huang, Chun-Chieh Lin, Peng-Chung Jangjian, Ji James Cui, Liang-Guang Chen, Chih Hung Chen, Kei-Wei Chen
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Patent number: 12159894Abstract: A display device includes a substrate, a photosensitive element formed above the substrate, a signal line formed above the substrate, and a transparent conductive member electrically connected to the signal line and the photosensitive element. In a normal direction of the substrate, the signal line does not overlap with the photosensitive element.Type: GrantFiled: September 8, 2021Date of Patent: December 3, 2024Assignee: InnoLux CorporationInventors: Hsiao-Feng Liao, Shu-Fen Li, Chuan-Chi Chien, I-An Yao
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Patent number: 12158675Abstract: A display device includes a backlight module and a display panel. The display panel is disposed on the backlight module and includes two substrates, a sensor, and a light-shielding element. The sensor is disposed between the two substrates. The light-shielding element at least partially surrounds the sensor. A height of the light-shielding element is greater than a height of the sensor.Type: GrantFiled: August 24, 2023Date of Patent: December 3, 2024Assignee: Innolux CorporationInventors: Hsiao Feng Liao, Shu-Fen Li, Chuan-Chi Chien, Po-Yang Chen, I-An Yao
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Publication number: 20240391049Abstract: A planarization tool is configured to monitor and analyze the condition of a polishing pad over the life of the polishing pad. A piezoelectric pad monitoring device may be mounted to a polishing head of the planarization tool in place of a semiconductor wafer. The piezoelectric pad monitoring device may be pressed against the polishing pad. When pressed against the polishing pad, the piezoelectric pad monitoring device may generate a signal based on a quantity of pad contacts, on the polishing pad, that are in contact with the piezoelectric pad monitoring device. The signal may be provided to a processor of the planarization tool so that the processor may generate, based on the signal, a map of the pad contacts on the polishing pad. The processor may use the map of the pad contacts to determine properties of the polishing pad such as roughness and/or uniformity, among other examples.Type: ApplicationFiled: May 25, 2023Publication date: November 28, 2024Inventors: Yi-Cheng LIN, Kao-Feng LIAO, Peng-Chung JANGJIAN
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Publication number: 20240395562Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20240395705Abstract: The semiconductor device includes a substrate, a stack disposed on the substrate, a first common source line and a second common source line disposed in the stack and connected to the substrate. The stack includes insulating layers and conductive layers alternately arranged. The first common source line and the second common source line are extended along a first direction and are arranged in a second direction that is perpendicular to the first direction. The first common source line includes a first segment and a second segment spaced apart by a first common source line cut. The second common source line includes a third segment and a fourth segment spaced apart by a second common source line cut. The first common source line cut is shifted relative to the second common source line cut in the first direction. A method of forming the semiconductor device is also disclosed.Type: ApplicationFiled: May 22, 2023Publication date: November 28, 2024Inventors: Ting-Feng LIAO, Mao-Yuan WENG, Kuang-Wen LIU
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Patent number: 12119416Abstract: According to the embodiments provided herein, a photovoltaic device can include a buffer layer adjacent to an absorber layer doped p-type with a group V dopant. The buffer layer can have a plurality of layers compatible with group V dopants.Type: GrantFiled: October 23, 2019Date of Patent: October 15, 2024Assignee: First Solar, Inc.Inventors: Le Chen, Sachit Grover, Jason Kephart, Sergei Kniajanski, Chungho Lee, Xiaoping Li, Feng Liao, Dingyuan Lu, Rajni Mallick, Wenming Wang, Gang Xiong, Wei Zhang
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Publication number: 20240264690Abstract: The present disclosure provides an electronic device including a first sensing unit, a first transistor coupled to the first sensing unit, a second transistor coupled to the first transistor, a second sensing unit, a third transistor coupled to the second sensing unit, a fourth transistor coupled to the third transistor, a first signal line coupled to the second transistor and the fourth transistor, and a power line coupled to the first transistor and the third transistor, in which the power line is disposed between the first sensing unit and the second sensing unit.Type: ApplicationFiled: April 1, 2024Publication date: August 8, 2024Applicant: InnoLux CorporationInventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
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Publication number: 20240237339Abstract: A semiconductor structure is provided. The semiconductor structure has a device region and a periphery region adjacent to the device region. The periphery region comprises an array contact defining region and a periphery contact defining region. The semiconductor structure comprises a substrate, a staircase structure, an etch stop layer, a plurality of array contacts, and a plurality of periphery contacts. The staircase structure is disposed on the substrate in the periphery region. The staircase structure comprises conductive layers and dielectric layers disposed alternately. The etch stop layer is disposed on the staircase structure in the array contact defining region. The array contacts are disposed on the staircase structure and through the etch stop layer in the array contact defining region. The periphery contacts are through the staircase structure in the periphery contact defining region.Type: ApplicationFiled: January 5, 2023Publication date: July 11, 2024Inventors: Ting-Feng LIAO, Kuang-Wen LIU
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Publication number: 20240213241Abstract: An ESD protection device includes a substrate, an epitaxial layer, first to third well regions, and first to sixth doped regions. The first to third well regions are disposed in the epitaxial layer. The third well region is disposed between the first and second well regions. The first and second doped regions are disposed on the first well region and coupled to a pad. The third and fourth doped regions are disposed on the second well region and coupled to a ground terminal. The fifth doped region is disposed on the third well region, and the sixth doped region is disposed in the fifth doped region. The third, fifth, and sixth doped regions have the same conductive type. In response to an electrostatic discharge event occurring on the pad, a discharge path is formed between the pad and the ground terminal.Type: ApplicationFiled: December 27, 2022Publication date: June 27, 2024Applicant: Vanguard International Semiconductor CorporationInventors: Yeh-Ning JOU, Jian-Hsing LEE, Chieh-Yao CHUANG, Hsien-Feng LIAO, Ting-Yu CHANG, Chih-Hsuan LIN, Wen-Hsin LIN, Hwa-Chyi CHIOU
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Publication number: 20240175920Abstract: The present disclosure provides a semiconductor wafer. The semiconductor wafer includes: a scribe line between a first row of dies and a second row of dies, and a benchmark circuit disposed on the scribe line. The benchmark circuit includes a first switching circuit, a first process control monitoring (PCM) device and a second PCM device coupled to the first switching circuit, and a second switching circuit. The first switching circuit is configured to selectively couple the first PCM device and the second PCM device to receive a test signal, wherein the first PCM device and the second PCM device are configured to output a first output signal and a second output signal in response to the test signal, respectively. The second switching circuit is configured to selectively couple the first PCM device and the second PCM device to output the first output signal or the second output signal.Type: ApplicationFiled: February 6, 2024Publication date: May 30, 2024Inventors: CHU-FENG LIAO, HUNG-PING CHENG, YUAN-YAO CHANG, SHUO-WEN CHANG