Abstract: Methods and devices including a plurality of memory cells and a first bit line connected to a first column of memory cells of the plurality of memory cells, and a second bit line connected to the first column of cells. The first bit line is shared with a second column of memory cells adjacent to the first column of memory cells. The second bit line is shared with a third column of cells adjacent to the first column of cells opposite the second column of cells.

Abstract: Embodiments of the disclosure provide a robot cleaner for cleaning a stair. The robot cleaner includes a main body configured to rotate around a first shaft. The robot cleaner further includes at least one leg each configured to rotate around a second shaft. The robot cleaner also includes at least one connector each configured to connect each leg to the main body. Each connector comprises a first end attached to the first shaft and a second end attached to the second shaft. The robot cleaner is configured to climb the stair by first lifting the main body onto a tread of the stair through rotations of the main body and the at least one connector and then lifting the at least one leg onto the tread through rotations of the at least one connector and the at least one leg.

Abstract: Embodiments of the disclosure provide a method for controlling a robot cleaner to climb a stair. The robot cleaner includes a main body, at least one leg, and at least one connector connecting each leg to the main body. The method includes rotating the main body relative to the at least one leg to be substantially vertical to a thread of the stair. The method further includes rotating the main body to lay flat on the tread. The method also includes rotating the at least one leg to align with the at least one connector. The method additionally includes rotating the at least one leg to lay flat on the tread.

Abstract: Provided is a display device, including: a display panel and a drive mainboard. The drive mainboard includes a first processor and a second processor. The second processor is electrically connected to the first processor and the display panel. The first processor is configured to acquire data of an image changed portion in response to a control instruction and output the data of the image changed portion to the second processor. The control instruction is issued for controlling a partial change of an image displayed on the display panel. The second processor is configured to output N slave input signals to the display panel. The N slave input signals carry the data of the image changed portion, wherein N is a positive integer greater than 1. The display panel is configured to perform partial image refresh based on the data of the image changed portion.

Abstract: Disclosed is a calculation method for a mobile fluid saturation after reservoir fracturing based on netting analysis, including: performing a fracturing experiment and micro-computed tomography (CT) experiment designs before and after fracturing; dividing a pore development area and a dense area; comparing micro-CT scanning experimental images of the same reservoir core sample before and after fracturing, and dividing a fracture network formed after fracturing; analyzing the propagation of fracturing fractures by netting analysis; determining a porosity of fracturing reconstruction; further determining a mobile fluid saturation after fracturing; and combining with a logging curve to realize the continuous calculation of mobile fluid saturation after fracturing.

Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.

Abstract: Compounds having activity as inhibitors of G12C mutant KRAS protein are provided. The compounds have the following structure (I): or a pharmaceutically acceptable salt, tautomer, prodrug or stereoisomer thereof, wherein R1, R2a, R3a, R3b, R4a, R4b, G1, G2, L1, L2, m1, m2, A, B, W, X, Y, Z and E are as defined herein. Methods associated with preparation and use of such compounds, pharmaceutical compositions comprising such compounds and methods to modulate the activity of G12C mutant KRAS protein for treatment of disorders, such as cancer, are also provided.

Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions. An etch block structure is arranged on the first side of the substrate between neighboring ones of the plurality of gate structures. A contact etch stop layer (CESL) is arranged on the etch block structure between the neighboring ones of the plurality of gate structures. An isolation structure is disposed between one or more sidewalls of the substrate and extends from a second side of the substrate to the first side of the substrate. The etch block structure is vertically between the isolation structure and the CESL.

Abstract: A method for fabricating the three-dimensional comb-tooth-shaped groove array surface, the surface of the bearing is first etched with grooves having a certain depth by means of femtosecond lase, then a PTFE film is impressed and attached to the surface of the inner ring of the bearing, the position of a laser focus is adjusted to focus on the lower surface of the PTFE film, the same pit is scanned repeatedly, ripple characteristic stripes occur on the surface of the inner ring of the bearing while the film gasifies instantly under the action of laser ablation heating, a part of polymer material in the gasified part is adsorbed to a mechanical surface in each pit under the action of mechanical interlocking, and a super-oleophobic PTFE surface is obtained in each groove.

Abstract: A semiconductor structure includes an SRAM cell that includes first and second pull-up (PU) transistors, first and second pull-down (PD) transistors, and first and second pass-gate (PG) transistors. A source, a drain, and a channel of the first PU transistor and a source, a drain, and a channel of the second PU transistor are collinear. A source, a drain, and a channel of the first PD transistor, a source, a drain, and a channel of the second PD transistor, a source, a drain, and a channel of the first PG transistor, and a source, a drain, and a channel of the second PG transistor are collinear.

Abstract: Disclosed is a calculation method for a mobile fluid saturation after reservoir fracturing based on netting analysis, including: performing a fracturing experiment and micro-computed tomography (CT) experiment designs before and after fracturing; dividing a pore development area and a dense area; comparing micro-CT scanning experimental images of the same reservoir core sample before and after fracturing, and dividing a fracture network formed after fracturing; analyzing the propagation of fracturing fractures by netting analysis; determining a porosity of fracturing reconstruction; further determining a mobile fluid saturation after fracturing; and combining with a logging curve to realize the continuous calculation of mobile fluid saturation after fracturing.

Abstract: An antenna impedance matching design circuit includes a load circuit, a filter circuit and a matching circuit which are connected to each other. The load circuit is connected to one end of the filter circuit for connecting a near field communication chip, and the matching circuit includes a plurality of capacitors.

Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.

Abstract: A semiconductor device including nanosheet field-effect transistors (NSFETs) in a first region and fin field-effect transistors (FinFETs) in a second region and methods of forming the same are disclosed. In an embodiment, a device includes a first memory cell, the first memory cell including a first transistor including a first channel region, the first channel region including a first plurality of semiconductor nanostructures; and a second transistor including a second channel region, the second channel region including a semiconductor fin.

Abstract: The present invention relates to a novel coronavirus vaccine using a TLR7 agonist conjugated peptide as an antigen and an emulsion as an adjuvant. An antigen polypeptide of the conjugated peptide is a polypeptide derived from an S protein of SARS-COV-2, and the adjuvant is an oil-in-water nanoemulsion containing squalene. The conjugated peptide nanoemulsion vaccine preparation of the present invention is thermally stable, and can induce a high level of protective humoral immune response in a cynomolgus monkey, and the neutralizing antibody titer of antiserum after immunization of cynomolgus monkey is high, such that invasion of wild-type strain and mutant novel coronavirus can be blocked. The vaccine of the present invention has a nearly complete protection effect on the upper and lower respiratory tracts of the cynomolgus monkey in a cynomolgus monkey SARS-COV-2 challenge test.

Abstract: A semiconductor structure includes an SRAM cell that includes first and second pull-up (PU) transistors, first and second pull-down (PD) transistors, and first and second pass-gate (PG) transistors. A source, a drain, and a channel of the first PU transistor and a source, a drain, and a channel of the second PU transistor are collinear. A source, a drain, and a channel of the first PD transistor, a source, a drain, and a channel of the second PD transistor, a source, a drain, and a channel of the first PG transistor, and a source, a drain, and a channel of the second PG transistor are collinear.

Abstract: The embodiments of the present disclosure provide a display substrate, a display panel and a manufacturing method thereof. The display substrate includes a body portion and a to-be-cut portion arranged on at least one side of the body portion, and the body portion and the to-be-cut portion are in a same plane and connected to have a one-piece structure; the display substrate further includes a plurality of test electrodes, some test electrodes are arranged on the body portion, and the other test electrodes are arranged on the to-be-cut portion. The display panel includes the body portion in the display substrate.

Abstract: Disclosed are a system and method for detecting a vulnerability of an Internet of Things in Power Systems (IOTIPS) protocol based on fuzz testing. The system includes: a protocol configuration module configured to configure a protocol to be detected and a data frame of the protocol to be detected; a sample generation module configured to: after loading the protocol and the data frame configured by the protocol configuration module, configure a mutation strategy based on the loaded protocol, and generate a test sample based on the configured mutation strategy; and an execution monitoring module configured to transfer the test sample generated by the sample generation module to a device to be detected for testing, perform link management and test execution, store a test result, and generate a detection report.

Abstract: The present application relates to a technical field of a balancing scooter, particularly discloses an auxiliary riding device, a balancing scooter and an auxiliary riding method for the balancing scooter. The auxiliary riding device includes a mounting base, a stop block, a braking mechanism and an auxiliary mechanism; the auxiliary mechanism includes a swinging arm rotatably connected to the mounting base and an auxiliary member connected to the swinging arm; the swinging arm has a released state and a contraction state; the stop block has a locked state engaged with the swinging arm and an unlocked state separated from the swinging arm.

Abstract: A microfluidic chip and a driving method thereof are provided. The microfluidic chip includes a base substrate, a driving circuit array, a first decoding circuit, and a second decoding circuit, the driving circuit array, the first decoding circuit, and the second decoding circuit are all integrated on the base substrate; the first decoding circuit is configured to generate and output a target scan driving signal to the driving circuit array; the second decoding circuit is configured to generate and output a target driving voltage signal to the driving circuit array; and the driving circuit array is configured to control an operation of a liquid droplet over the driving circuit array based on the target scan driving signal and the target driving voltage signal.