Patents by Inventor Feng-Lun Wu

Feng-Lun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10276395
    Abstract: The present invention provides a method for manufacturing a semiconductor device including following steps. A substrate, a hard mask layer disposed on the substrate and a first mask pattern disposed on the hard mask layer are provided, and the substrate has a device region and a cutting line region. The first mask pattern has first gaps in the device region and second gaps in the cutting line region. Next, a spacer layer conformally covers the first mask pattern. Then, a second mask pattern is formed on the spacer layer in the first gaps, and a top surface of the second mask pattern is lower than a top surface of the first mask pattern. Thereafter, an etching process is performed to the spacer layer to remove the spacer layer between the first mask layer and the second mask layer and in the second gaps and expose the hard mask layer.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: April 30, 2019
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chien-Hao Chen, Feng-Lun Wu, Chung-Ping Hsia, Sho-Shen Lee
  • Publication number: 20180286692
    Abstract: The present invention provides a method for manufacturing a semiconductor device including following steps. A substrate, a hard mask layer disposed on the substrate and a first mask pattern disposed on the hard mask layer are provided, and the substrate has a device region and a cutting line region. The first mask pattern has first gaps in the device region and second gaps in the cutting line region. Next, a spacer layer conformally covers the first mask pattern. Then, a second mask pattern is formed on the spacer layer in the first gaps, and a top surface of the second mask pattern is lower than a top surface of the first mask pattern. Thereafter, an etching process is performed to the spacer layer to remove the spacer layer between the first mask layer and the second mask layer and in the second gaps and expose the hard mask layer.
    Type: Application
    Filed: March 21, 2018
    Publication date: October 4, 2018
    Inventors: Chien-Hao Chen, Feng-Lun Wu, Chung-Ping Hsia, Sho-Shen Lee