Patents by Inventor Feng-Ming Lee

Feng-Ming Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9437266
    Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a dielectric layer, a conductive ion-barrier layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the dielectric layer to represent a data value using bias voltages having the same polarity, enabling the use of diode access devices. To form a conductive bridge, a bias is applied that is high enough to cause ions to penetrate the conductive ion-barrier layer into the dielectric layer, which then form filaments or bridges. To destruct the conductive bridge, a bias of the same polarity is applied that causes current to flow through the structure, while ion flow is blocked by the conductive ion-barrier layer. As a result of Joule heating, any bridge in the dielectric layer disintegrates.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: September 6, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Feng-Ming Lee, Yu-Yu Lin, Ming-Hsiu Lee
  • Patent number: 9117515
    Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a first dielectric layer, a second dielectric layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the first dielectric layer to represent a data value. During read, a read bias is applied that is sufficient to cause formation of a transient bridge in the second dielectric layer, and make a conductive path through the cell if the bridge is present in the first dielectric layer. If the bridge is not present in the first dielectric layer during the read, then the conductive path is not formed. Upon removal of the read bias voltage any the conductive bridge formed in the second dielectric layer is destructed while the conductive bridge in the corresponding other first dielectric layer, if any, remains.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: August 25, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Feng-Ming Lee, Yu-Yu Lin
  • Patent number: 9036397
    Abstract: A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance. A resistive memory array including an array of the above resistive memory units, word lines and bit lines is also described, wherein the word (bit) lines are coupled to the first (second) memory layers.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: May 19, 2015
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Wei-Chih Chien, Ming-Hsiu Lee, Feng-Ming Lee
  • Patent number: 9019769
    Abstract: A semiconductor device and a manufacturing method and an operating method for the same are provided. The semiconductor device comprises a substrate, a doped region and a stack structure. The doped region is in the substrate. The stack structure is on the substrate. The stack structure comprises a dielectric layer, an electrode layer, a solid electrolyte layer and an ion supplying layer.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: April 28, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Feng-Ming Lee, Yu-Yu Lin, Ming-Hsiu Lee
  • Patent number: 9000412
    Abstract: A switching device and an operating method for the same and a memory array are provided. The switching device comprises a first solid electrolyte, a second solid electrolyte and a switching layer. The switching layer is adjoined between the first solid electrolyte and the second solid electrolyte.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: April 7, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Wei-Chih Chien, Feng-Ming Lee, Ming-Hsiu Lee
  • Publication number: 20140160852
    Abstract: A semiconductor device and a manufacturing method and an operating method for the same are provided. The semiconductor device comprises a substrate, a doped region and a stack structure. The doped region is in the substrate. The stack structure is on the substrate. The stack structure comprises a dielectric layer, an electrode layer, a solid electrolyte layer and an ion supplying layer.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Feng-Ming Lee, Yu-Yu Lin, Ming-Hsiu Lee
  • Publication number: 20140131653
    Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a dielectric layer, a conductive ion-barrier layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the dielectric layer to represent a data value using bias voltages having the same polarity, enabling the use of diode access devices. To form a conductive bridge, a bias is applied that is high enough to cause ions to penetrate the conductive ion-barrier layer into the dielectric layer, which then form filaments or bridges. To destruct the conductive bridge, a bias of the same polarity is applied that causes current to flow through the structure, while ion flow is blocked by the conductive ion-barrier layer. As a result of Joule heating, any bridge in the dielectric layer disintegrates.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Inventors: FENG-MING LEE, YU-YU LIN, MING-HSIU LEE
  • Publication number: 20140027706
    Abstract: A switching device and an operating method for the same and a memory array are provided. The switching device comprises a first solid electrolyte, a second solid electrolyte and a switching layer. The switching layer is adjoined between the first solid electrolyte and the second solid electrolyte.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 30, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Chih Chien, Feng-Ming Lee, Ming-Hsiu Lee
  • Publication number: 20130182487
    Abstract: A programmable metallization device comprises a first electrode and a second electrode, and a first dielectric layer, a second dielectric layer, and an ion-supplying layer in series between the first and second electrodes. In operation, a conductive bridge is formed or destructed in the first dielectric layer to represent a data value. During read, a read bias is applied that is sufficient to cause formation of a transient bridge in the second dielectric layer, and make a conductive path through the cell if the bridge is present in the first dielectric layer. If the bridge is not present in the first dielectric layer during the read, then the conductive path is not formed. Upon removal of the read bias voltage any the conductive bridge formed in the second dielectric layer is destructed while the conductive bridge in the corresponding other first dielectric layer, if any, remains.
    Type: Application
    Filed: January 18, 2012
    Publication date: July 18, 2013
    Inventors: FENG-MING LEE, Yu-Yu Lin
  • Patent number: 8331127
    Abstract: A memory device comprises an array of memory cells each capable of storing multiple bits of data. The memory cells are arranged in memory strings that are connected to a common source line. Each memory cell includes a programmable transistor connected in parallel with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: December 11, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yi-Chou Chen, Wei-Chih Chien, Feng-Ming Lee
  • Patent number: 8295075
    Abstract: A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: October 23, 2012
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Wei-Chih Chien, Yi-Chou Chen, Feng-Ming Lee
  • Patent number: 8149610
    Abstract: A memory device comprises an array of memory cells each capable of storing multiple bits of data. Each memory cell includes a programmable transistor in series with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: April 3, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yi-Chou Chen, Wei-Chih Chien, Feng-Ming Lee
  • Patent number: 8134139
    Abstract: A programmable metallization device, comprises a first electrode; a memory layer electrically coupled to the first electrode and adapted for electrolytic formation and destruction of a conducting bridge therethrough; an ion-supplying layer containing a source of ions of a first metal element capable of diffusion into and out of the memory layer; a conductive ion buffer layer between the ion-supplying layer and the memory layer, and which allows diffusion therethrough of said ions; and a second electrode electrically coupled to the ion-supplying layer. Circuitry is coupled to the device to apply bias voltages to the first and second electrodes to induce creation and destruction of conducting bridges including the first metal element in the memory layer. The ion buffer layer can improve retention of the conducting bridge by reducing the likelihood that the first metallic element will be absorbed into the ion supplying layer.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: March 13, 2012
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Yu Lin, Feng-Ming Lee, Yi-Chou Chen
  • Publication number: 20110286258
    Abstract: A memory device comprises an array of memory cells each capable of storing multiple bits of data. The memory cells are arranged in memory strings that are connected to a common source line. Each memory cell includes a programmable transistor connected in parallel with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 24, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yi-Chou Chen, Wei-Chih Chien, Feng-Ming Lee
  • Publication number: 20110280058
    Abstract: A memory device comprises an array of memory cells each capable of storing multiple bits of data. Each memory cell includes a programmable transistor in series with a resistance switching device. The transistor is switchable between a plurality of different threshold voltages associated with respective memory states. The resistance switching device is configured to be switchable between a plurality of different resistances associated with respective memory states.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 17, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yi-Chou Chen, Wei-Chih Chien, Feng-Ming Lee
  • Publication number: 20110242874
    Abstract: A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 6, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Chih Chien, Yi-Chou Chen, Feng-Ming Lee
  • Publication number: 20110180775
    Abstract: A programmable metallization device, comprises a first electrode; a memory layer electrically coupled to the first electrode and adapted for electrolytic formation and destruction of a conducting bridge therethrough; an ion-supplying layer containing a source of ions of a first metal element capable of diffusion into and out of the memory layer; a conductive ion buffer layer between the ion-supplying layer and the memory layer, and which allows diffusion therethrough of said ions; and a second electrode electrically coupled to the ion-supplying layer. Circuitry is coupled to the device to apply bias voltages to the first and second electrodes to induce creation and destruction of conducting bridges including the first metal element in the memory layer. The ion buffer layer can improve retention of the conducting bridge by reducing the likelihood that the first metallic element will be absorbed into the ion supplying layer.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 28, 2011
    Applicant: Macronix International Co., Ltd.
    Inventors: Yuyu LIN, Feng-Ming Lee, Yi-Chou Chen