Patents by Inventor Feng Q. Liu

Feng Q. Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250250675
    Abstract: Organometallic precursors and methods of depositing high purity metal films are discussed. Some embodiments utilize a method comprising exposing a substrate surface to an organometallic precursor comprising one or more of molybdenum (Mo), tungsten (W), osmium (Os), technetium (Tc), manganese (Mn), rhenium (Re) or ruthenium (Ru), and an iodine-containing reactant comprising a species having a formula RIx, where R is one or more of a C1-C10 alkyl, C3-C10 cycloalkyl, C2-C10 alkenyl, or C2-C10 alkynyl group, I is an iodine group and x is in a range of 1 to 4 to form a carbon-less iodine-containing metal film. Some embodiments advantageously provide methods of forming metal films having low carbon content (e.g., having greater than or equal to 95% metal species on an atomic basis), without using an oxidizing agent or a reductant.
    Type: Application
    Filed: March 24, 2025
    Publication date: August 7, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Mark Saly, David Thompson, Annamalai Lakshmanan, Avgerinos V. Gelatos, Joung Joo Lee
  • Publication number: 20250233015
    Abstract: Methods of manufacturing interconnect structures as part of a microelectronic device fabrication process are described. The methods include forming a dielectric layer including at least one feature defining a gap having sidewalls and a bottom on a substrate. The methods further include forming a blocking layer on the bottom by exposing the substrate to a blocking compound; selectively depositing a barrier layer on the sidewalls; selectively depositing a metal liner on the barrier layer on the sidewalls; removing the blocking layer; and performing a gap fill process to fill the gap with a gapfill material.
    Type: Application
    Filed: January 14, 2025
    Publication date: July 17, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Bhaskar Jyoti Bhuyan, Lisa J. Enman, Feng Q. Liu, Jeffrey W. Anthis, Mark Saly, Lakmal C. Kalutarage, Aaron Dangerfield, Jesus Candelario Mendoza-Gutierrez, Sze Chieh Tan
  • Publication number: 20250218867
    Abstract: Provided are methods of forming a semiconductor device. The method includes exposing a top surface of a substrate to a reactant and a metal precursor to selectively deposit a capping layer on the top surface of the substrate, the substrate comprising at least one feature formed in a dielectric layer, the dielectric layer defining a filled gap including sidewalls and a bottom, a barrier layer on the sidewalls of the filled gap, and a metal liner on the barrier layer, the capping layer depositing on one or more of the filled gap, the barrier layer, and the metal liner.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 3, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Zheng Ju, Mark Saly, Zhiyuan Wu, Feng Chen
  • Publication number: 20250157856
    Abstract: Embodiments of the invention provide a method of forming a molybdenum (Mo) capping layer that is used to prevent copper diffusion in interconnect boundary regions of a formed semiconductor device. The molybdenum capping will improve copper boundary region properties to promote adhesion, decrease diffusion and copper agglomeration. Embodiments provide that a molybdenum capping layer may be selectively deposited on a surface of a copper interconnect structures formed in a dielectric layer formed on a substrate.
    Type: Application
    Filed: October 10, 2024
    Publication date: May 15, 2025
    Inventors: Jiajie CEN, Zheng JU, Feng Q. LIU, Ying-Bing JIANG, Shiyu YUE, Xianmin TANG
  • Publication number: 20250132165
    Abstract: Methods of removing molybdenum oxide from a surface of a substrate comprise exposing the substrate having a molybdenum oxide layer on the substrate to a halide etchant having the formula RmSiX4-m, wherein m is an integer from 1 to 3, X is selected from iodine (I) and bromine (Br) and R is selected from the group consisting of a methyl group, ethyl group, propyl group, butyl group, cyclohexyl group and cyclopentyl group. The methods may be performed in a back-end-of-the line (BEOL) process, and the substrate contains a low-k dielectric material.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Jiajie Cen, Feng Q. Liu, Zheng Ju, Zhiyuan Wu, Kevin Kashefi, Mark Saly, Xianmin Tang
  • Patent number: 12281387
    Abstract: Organometallic precursors and methods of depositing high purity metal films are discussed. Some embodiments utilize a method comprising exposing a substrate surface to an organometallic precursor comprising one or more of molybdenum (Mo), tungsten (W), osmium (Os), technetium (Tc), manganese (Mn), rhenium (Re) or ruthenium (Ru), and an iodine-containing reactant comprising a species having a formula RIx, where R is one or more of a C1-C10 alkyl, C3-C10 cycloalkyl, C2-C10 alkenyl, or C2-C10 alkynyl group, I is an iodine group and x is in a range of 1 to 4 to form a carbon-less iodine-containing metal film. Some embodiments advantageously provide methods of forming metal films having low carbon content (e.g., having greater than or equal to 95% metal species on an atomic basis), without using an oxidizing agent or a reductant.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: April 22, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Mark Saly, David Thompson, Annamalai Lakshmanan, Avgerinos V. Gelatos, Joung Joo Lee
  • Patent number: 12281382
    Abstract: Methods of selectively depositing blocking layers on conductive surfaces over dielectric surfaces are described. In some embodiments, a 4-8 membered substituted heterocycle is exposed to a substrate to selectively form a blocking layer. In some embodiments, a layer is selectively deposited on the dielectric surface after the blocking layer is formed. In some embodiments, the blocking layer is removed.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: April 22, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Lakmal C. Kalutarage, Bhaskar Jyoti Bhuyan, Aaron Dangerfield, Feng Q. Liu, Mark Saly, Michael Haverty, Muthukumar Kaliappan
  • Publication number: 20250125195
    Abstract: Embodiments of the disclosure relate to methods using an oligomer film to protect a substrate surface. The oligomer film is formed on the substrate surface with a first feature and a second feature each having a feature depth. The first feature has a first critical dimension (CD) and the second feature has a second CD. The semiconductor substrate surface is exposed to one or more monomers to form the oligomer film, and the oligomer film forms selectively on the bottom and fills a portion of the feature depth. The oligomer film fills the feature depth to substantially the same or the same height in each of the first feature and the second feature. Methods of forming semiconductor devices using the oligomer film are also disclosed.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 17, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Xinke Wang, Liqi Wu, Qihao Zhu, Mark Saly, Jiang Lu, John Sudijono, David Thompson
  • Patent number: 12272551
    Abstract: Embodiments of the disclosure relate to methods for selectively removing metal material from the top surface and sidewalls of a feature. The metal material which is covered by a flowable polymer material remains unaffected. In some embodiments, the metal material is formed by physical vapor deposition resulting in a relatively thin sidewall thickness. Any metal material remaining on the sidewall after removal of the metal material from the top surface may be etched by an additional etch process. The resulting metal layer at the bottom of the feature facilitates selective metal gapfill of the feature.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: April 8, 2025
    Assignee: Applied Materials, Inc.
    Inventors: Liqi Wu, Feng Q. Liu, Bhaskar Jyoti Bhuyan, James Hugh Connolly, Zhimin Qi, Jie Zhang, Wei Dou, Aixi Zhang, Mark Saly, Jiang Lu, Rongjun Wang, David Thompson, Xianmin Tang
  • Publication number: 20250046602
    Abstract: A method includes obtaining a base structure of an electronic device, the base structure including at least one opening, and forming, using a reactive-ion deposition process, a dielectric material within the at least one opening.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 6, 2025
    Inventors: Bhaskar Jyoti Bhuyan, Mark J. Saly, Lakmal Charidu Kalutarage, Feng Q. Liu, Jeffrey W. Anthis, Abhijit Basu Mallick, Akhil Singhal
  • Publication number: 20250006552
    Abstract: Embodiments of the disclosure relate to methods of selectively depositing a metallic material after forming a flowable polymer film to protect a substrate surface within a feature. A first metal liner is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first metal liner on the bottom. A portion of the first metal liner is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, the cycle of depositing a metal liner, forming a flowable polymer film, removing a portion of the metal liner, and removing the flowable polymer film is repeated at least once. A metal layer is deposited on the plurality of metal liners (e.g., first metal liner and the second metal liner) and the metal layer is free of seams or voids.
    Type: Application
    Filed: June 25, 2024
    Publication date: January 2, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Liqi Wu, Rongjun Wang, Feng Q. Liu, Qihao Zhu, Jiang Lu, David Thompson, Xianmin Tang
  • Publication number: 20250006555
    Abstract: Embodiments of the disclosure relate to methods of selectively depositing a metal after use of a flowable polymer to protect a substrate surface within a feature. A first metal layer is deposited by physical vapor deposition (PVD). The semiconductor substrate surface is exposed to one or more monomers to form a flowable and flexible polymer film on the first metal layer within the at least one feature. The flowable polymer film forms on the first metal layer on the bottom. The one or more monomers are selected from one or more of amines with bi-functional groups, aldehydes with bi-functional groups, cyanates with bi-functional groups, ketones with bi-functional groups, and alcohols with bi-functional groups. At least a portion of the first metal layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Xinke Wang, Liqi Wu, Qihao Zhu, Bhaskar Jyoti Bhuyan, Mark Saly, David Thampson
  • Publication number: 20250006485
    Abstract: Embodiments of the disclosure relate to methods of selectively depositing polysilicon after forming a flowable polymer film to protect a substrate surface within a feature. A first silicon (Si) layer is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first silicon (Si) layer on the bottom. A portion of the first silicon (Si) layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, a second silicon (Si) layer is selectively deposited on the first silicon (Si) layer to fill the feature. In some embodiments, the remaining portion of the first silicon (Si) layer on the bottom is oxidized to form a first silicon oxide (SiOx) layer on the bottom, and a silicon (Si) layer or a second silicon oxide (SiOx) layer is deposited on the first silicon oxide (SiOx) layer.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Applicant: Applied Materials, Inc.
    Inventors: Mark Saly, Feng Q. Liu, Bhaskar Jyoti Bhuyan, Jeffrey W. Anthis, David Thompson
  • Publication number: 20240425536
    Abstract: Exemplary methods of semiconductor processing, such as methods of depositing a molybdenum-containing material on a substrate, may include providing a molybdenum-containing precursor to a processing region of a semiconductor processing chamber in which the substrate is located. The molybdenum-containing precursor may include a molybdenum complex according to Compound I: R may be methyl or ethyl, R? may be methyl or ethyl, R? may be methyl, ethyl, or propyl, and n may be equal to 1 or 2. Contacting the substrate with the molybdenum-containing precursor may deposit the molybdenum-containing material on the substrate.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 26, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Mark J. Saly, David Thompson
  • Publication number: 20240420966
    Abstract: Embodiments of the disclosure relate to methods of etching a copper material. In some embodiments, the copper material is exposed to a halide reactant to form a copper halide species. The substrate is then heated to remove the copper halide species. In some embodiments, the etching methods are performed at relatively low temperatures. Additional embodiments of the disclosure relate to methods of copper gapfill. In some embodiments, a copper material within a substrate feature is exposed to a halide reactant to form a copper halide species. The copper halide species is then heated and flowed to fill at least a portion of the substrate feature. The reflow methods are performed at lower temperatures than similar reflow methods without formation of the copper halide species.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Zhiyuan Wu, Zheng Ju, Feng Chen, Kevin Kashefi, Feng Q. Liu, Jeffrey W. Anthis
  • Publication number: 20240371654
    Abstract: A method of filling a feature in a semiconductor structure with metal includes depositing a metal cap layer on a bottom surface of a feature formed within a dielectric layer and top surfaces of the dielectric layer, partially filling the feature from the bottom surface with a flowable polymer layer, performing a metal pullback process to remove the metal cap layer on the top surfaces of the dielectric layer selectively to the dielectric layer, wherein the metal pullback process includes a first etch process including a chemical etch process using molybdenum hexafluoride (MoF6) to remove the metal cap layer selectively to the dielectric layer, and a second etch process to remove residues on etched surfaces of the dielectric layer, removing the flowable polymer layer, pre-cleaning a surface of the metal cap layer, and filling the feature from the surface of the metal cap layer with metal fill material.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 7, 2024
    Inventors: Qihao ZHU, Chi Hong CHING, Liqi WU, Tsungjui LIU, Gaurav THAREJA, Xinke WANG, Feng Q. LIU, Xi CEN, Kai WU, Yixiong YANG, Yuanhung LIU, Jiang LU, Rongjun WANG, Xianmin TANG
  • Publication number: 20240360549
    Abstract: A method includes performing a reactant step of a deposition cycle of a deposition process to form a molybdenum (Mo)-based material, performing a Mo precursor step of the deposition cycle, and performing a treatment step of the deposition cycle. Performing the reactant step includes introducing a reactant, performing the Mo precursor step includes introducing a Mo precursor, and performing the treatment step includes introducing a treatment gas. The deposition process is performed at a temperature that is less than or equal to about 450° C.
    Type: Application
    Filed: April 27, 2023
    Publication date: October 31, 2024
    Inventors: Feng Q. Liu, Byunghoon Yoon, Joung-Joo Lee, Avgerinos V. Gelatos, Mark J. Saly
  • Publication number: 20240290655
    Abstract: A method of selectively filling a via with a simultaneous liner deposition in a semiconductor structure includes forming a passivation layer selectively on an exposed surface of a conductive layer within a via formed in a dielectric layer formed over the conductive layer, forming a barrier layer selectively on inner sidewalls of the via and a trench formed in the dielectric layer, selectively filling the via with a first conductive material at least partially and simultaneously depositing the first conductive material on the barrier layer on the inner sidewalls of the via and the trench, to form a liner on the inner sidewalls of the via and the trench, and filling the remaining of the via and the trench with a second conductive material.
    Type: Application
    Filed: February 28, 2023
    Publication date: August 29, 2024
    Inventors: Zheng JU, Zhiyuan WU, Jiajie CEN, Feng Q. LIU, Feng CHEN
  • Publication number: 20240248391
    Abstract: Methods of manufacturing an extreme ultraviolet (EUV) pellicles are disclosed. The methods comprise forming on a carbon nanotube (CNT) membrane of an EUV pellicle a nucleation layer. A protective material layer is deposited on the nucleation layer, the protective material layer exhibiting greater than 90% transmission of 13.5 nm EUV light. The methods may be performed by atomic layer deposition. The protective material layer may be selected from aluminum (Al), aluminum nitride (AlN), aluminum oxide (Al2O3), boron carbide (B4C), boron nitride (BN), molybdenum (Mo), molybdenum silicide (MoSi2), molybdenum carbide (MoC, Mo2C), ruthenium (Ru), ruthenium niobium alloy (RuNb), ruthenium oxide (RuO, RUO2), tantalum nitride (TaN), tantalum (Ta), yttrium nitride (YN), zirconium boride (ZrB2), zirconium silicide (ZrSi2), and silicon carbide (SiC).
    Type: Application
    Filed: January 16, 2024
    Publication date: July 25, 2024
    Applicant: Applied Mateials, Inc.
    Inventors: Thomas Joseph Knisley, Lakmal C. Kalutarage, Mark Saly, Nasrin Kazem, Feng Q. Liu, Jeffrey W. Anthis
  • Publication number: 20240200188
    Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Feng Q. Liu, Hua Chung, Schubert Chu, Mei Chang, Jeffrey W. Anthis, David Thompson