Patents by Inventor Fengbin TU

Fengbin TU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD AND DEVICE FOR OPTIMIZING CIRCUIT DESIGN OF A DIGITAL COMPUTE-IN-MEMORY MACRO
    Publication number: 20260195515
    Abstract: A computer-implemented method for optimizing circuit design of a digital compute-in-memory (DCIM) macro is disclosed. The method comprises: performing, based on a DCIM macro template and structural parameters for the DCIM macro, design space exploration (DSE) to obtain a first design of the DCIM macro that is configured with no pipeline stages, and a plurality of circuit cells to be coupled via one or more pipeline stages to provide a pipeline architecture; performing, based on power-performance-area (PPA) constraints and using a DCIM module library, rapid PPA evaluations on the first design to determine an optimal pipeline architecture for the DCIM macro to obtain a second design thereof; and performing slack-power tuning, based on the second design, on non-critical stages of the DCIM macro defined by the optimal pipeline architecture to obtain a third design of the DCIM macro.
    Type: Application
    Filed: August 28, 2025
    Publication date: July 9, 2026
    Inventors: Fengbin TU, Jia CHEN, Xiao HUO, Kwang Ting CHENG
  • Automatic compilation method and framework for generating a layout of integrated memory-compute circuit
    Patent number: 12651106
    Abstract: An automatic compilation method and framework for generating a layout for an integrated memory-compute circuit design is provided.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: June 9, 2026
    Assignee: AI Chip Center for Emerging Smart Systems Limited
    Inventors: Jia Chen, Fengbin Tu, Xiao Huo
  • METHOD AND SYSTEM FOR PROCESSING AN IMAGE
    Publication number: 20260148526
    Abstract: A method for processing an image, comprising: generating, by a hybrid attention processing unit, a first matrix based on a feature associated with the image and a second matrix based on information associated with the feature; and processing, by the hybrid attention processing unit, the image with the first and second matrices based on a linear attention process.
    Type: Application
    Filed: September 29, 2025
    Publication date: May 28, 2026
    Inventors: Pingcheng DONG, Yonghao TAN, Xuejiao LIU, Yu LIU, Peng LUO, Luhong LIANG, Fengbin TU, Kwang Ting CHENG
  • AUTOMATIC COMPILATION METHOD AND FRAMEWORK FOR GENERATING A LAYOUT OF INTEGRATED MEMORY-COMPUTE CIRCUIT
    Publication number: 20240403527
    Abstract: An automatic compilation method and framework for generating a layout for an integrated memory-compute circuit design is provided.
    Type: Application
    Filed: May 31, 2023
    Publication date: December 5, 2024
    Inventors: Jia CHEN, Fengbin TU, Xiao HUO