Abstract: According to an example, a display having a display surface may comprise a backlight, a collimator, and a scattering layer. The backlight may emit light towards the display surface, the light being narrowed by the collimator. The collimator may be located between the display surface and the backlight and the scattering layer may be between the display surface and the collimator. The scattering layer may be selectively operable between a diffuse state in which light traveling through the scattering layer is scattered and a non-diffuse state in which the direction of travel of the light traveling through the scattering layer is substantially unaffected.

Abstract: In some examples, an electronic device, comprises: a plurality of light emitting diodes (LEDs) arranged into first and second zones; and a driver coupled to the LEDs in the first and second zones, the driver to, in an image scan direction, provide a level of power to the LEDs in the first zone and to the LEDs in the second zone.

Abstract: According to an example, a display having a display surface may comprise a backlight, a collimator, and a scattering layer. The backlight may emit light towards the display surface, the light being narrowed by the collimator. The collimator may be located between the display surface and the backlight and the scattering layer may be between the display surface and the collimator. The scattering layer may be selectively operable between a diffuse state in which light traveling through the scattering layer is scattered and a non-diffuse state in which the direction of travel of the light traveling through the scattering layer is substantially unaffected.

Abstract: Communication circuitry is comprised of processing circuitry, parallel channels, and crossbar integrated circuits. The processing circuitry exchanges the communications between communication links and the parallel channels. The parallel channels transfer the communications in parallel with a clock signal. The crossbar integrated circuits receive the communications and the clock signal over the parallel channels, switch the communications based on the clock signal, and transfer the switched communications to the parallel channels.

Abstract: Signal processing techniques are applied to data rates at state-of-the-art circuit speeds (presently 1.6 Gbit/sec) by carrying out the signal flow graph of a cannonical FIR filter algorithm using hybrid analog and digital circuit techniques. A plurality of digital to analog converters (DACs) generate analog currents that are the analogue of the tap coefficients of the FIR filter model. The DACs are used as programmable current sources for the tail current sources of respective differential pair stages. Differential delay signals that are the analogue of the FIR delay-line tap signals are connected to the inputs of respective ones of the differential pair stages. The drains of the input devices of the differential pair stages are connected in parallel to common complementary load circuits. The delay signals act to steer the tap coefficient currents to one or the other of the common load circuits.

Abstract: In a preferred embodiment, the invention uses an 8-to-1 data serialization circuit in the transmitter to convert 80-bit parallel 200 MHz data to 10-bit parallel 1.6 Mb/s date. On the receiver side, data are captured using a forwarded clock and de-serialized. A single global DLL generates 16 master phases without reference to the word boundaries of data being transmitted. These 16 unreferenced phases are input to a phase rotator that, via a series of calibration steps, maps the unreferenced phases into named phases, and in doing so references the phases to the word boundary of the data being transmitted over the slowest data line of the parallel channel. The named phases are then input to a data interpolator in each receiver, which generates 16 local phases. The 16 local phases correspond to the data-bit centers and data-bit edges for each of the 8 bits transferred per major channel clock period.

Abstract: Communication circuitry is comprised of processing circuitry, parallel channels, and crossbar integrated circuits. The processing circuitry exchanges the communications between communication links and the parallel channels. The parallel channels transfer the communications in parallel with a clock signal. The crossbar integrated circuits receive the communications and the clock signal over the parallel channels, switch the communications based on the clock signal, and transfer the switched communications to the parallel channels.