Patents by Inventor Fengxia WU

Fengxia WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9959660
    Abstract: A device for image processing includes a first queue, a second queue, a cache, and a processor. The first queue is capable of receiving a first image tile. The processor is electrically connected to the first queue, the second queue, and the cache, respectively. The processor is capable of obtaining the first image tile from the first queue and obtaining mask information of the background mask corresponding to the first tile from the cache. The processor determines the relationship between the first image tile and the background mask based on the first image tile and the mask information so as to selectively transfer the first image tile to the second queue.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: May 1, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Fengxia Wu, Wei Zhang, Zhou Hong, Yuanfeng Wang
  • Publication number: 20170169600
    Abstract: A device for image processing includes a first queue, a second queue, a cache, and a processor. The first queue is capable of receiving a first image tile. The processor is electrically connected to the first queue, the second queue, and the cache, respectively. The processor is capable of obtaining the first image tile from the first queue and obtaining mask information of the background mask corresponding to the first tile from the cache. The processor determines the relationship between the first image tile and the background mask based on the first image tile and the mask information so as to selectively transfer the first image tile to the second queue.
    Type: Application
    Filed: June 6, 2016
    Publication date: June 15, 2017
    Inventors: FENGXIA WU, WEI ZHANG, ZHOU HONG, YUANFENG WANG
  • Publication number: 20170161081
    Abstract: An apparatus for enqueuing kernels on a device-side is introduced to incorporate with at least a MXU (Memory Access Unit) and a CSP (Command Stream Processor): The CSP, after receiving a first command from the MXU, executes commands of a ring buffer, thereby enabling an EU (Execution Unit) to direct the MXU to allocate space of the ring buffer for a first hardware thread and subsequently write second commands of the first hardware thread into the allocated space of the ring buffer according to an instruction of a kernel.
    Type: Application
    Filed: June 2, 2016
    Publication date: June 8, 2017
    Inventors: Fengxia WU, Tian SHEN, Zhou HONG, Yuanfeng WANG
  • Publication number: 20160379334
    Abstract: A graphics processing unit and associated graphics processing method are provided. The graphics processing unit includes: an execution unit, for performing shader execution and texture loading; a fixed-function unit, for executing a graphics rendering pipeline; a memory-access unit; a texture unit, for reading texture data from a memory via the memory-access unit according to the data requirement of the execution unit or the fixed-function unit; and a command stream parser, for receiving a draw command from a display driver, and transmitting the draw command to the execution unit or the fixed-function unit to perform graphics processing according to the type of draw command. When the command stream parser determines that the draw command is a specific draw command, the command stream parser transmits the draw command only to the fixed-function unit to perform graphics processing, and turns off power to the execution unit.
    Type: Application
    Filed: August 26, 2015
    Publication date: December 29, 2016
    Inventors: Fengxia WU, Yuanfeng WANG, Zhou HONG, Heng QUE