Patents by Inventor Fenton McFeely

Fenton McFeely has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7488512
    Abstract: In a solid precursor evaporation system configured for use in a thin film deposition system, such as thermal chemical vapor deposition (TCVD), a method for preparing one or more trays of solid precursor is described. The solid precursor may be formed on a coating substrate, such as a tray, using one or more of dipping techniques, spin-on techniques, and sintering techniques.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: February 10, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Kenji Suzuki, Emmanuel P. Guidotti, Gerrit J. Leusink, Masamichi Hara, Daisuke Kuroiwa, Sandra G. Malhotra, Fenton McFeely, Robert R. Young, Jr.
  • Publication number: 20080038905
    Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000° C.), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 ? classical), which cannot be achieved using TaSiN.
    Type: Application
    Filed: October 19, 2007
    Publication date: February 14, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alessandro Callegari, Martin Frank, Rajarao Jammy, Dianne Lacey, Fenton McFeely, Sufi Zafar
  • Publication number: 20080003360
    Abstract: A method for increasing deposition rates of metal layers from metal-carbonyl precursors by mixing a vapor of the metal-carbonyl precursor with CO gas. The method includes providing a substrate in a process chamber of a deposition system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate to the process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.
    Type: Application
    Filed: September 18, 2007
    Publication date: January 3, 2008
    Applicants: TOKYO ELECTRON LIMITED, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kenji Suzuki, Emmanuel Guidotti, Gerrit Leusink, Fenton McFeely, Sandra Malhotra
  • Publication number: 20060289903
    Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
    Type: Application
    Filed: August 30, 2006
    Publication date: December 28, 2006
    Inventors: Wanda Andreoni, Alessandro Callegari, Eduard Cartier, Alessandro Curioni, Christopher D'Emic, Evgeni Gousev, Michael Gribelyuk, Paul Jamison, Rajarao Jammy, Dianne Lacey, Fenton McFeely, Vijay Narayanan, Carlo Pignedoli, Joseph Shepard, Sufi Zafar
  • Publication number: 20060246740
    Abstract: The present invention provides a method for removing charged defects from a material stack including a high k gate dielectric and a metal contact such that the final gate stack, which is useful in forming a pFET device, has a threshold voltage substantially within the silicon band gap and good carrier mobility. Specifically, the present invention provides a re-oxidation procedure that will restore the high k dielectric of a pFET device to its initial, low-defect state. It was unexpectedly determined that by exposing a material stack including a high k gate dielectric and a metal to dilute oxygen at low temperatures will substantially eliminate oxygen vacancies, resorting the device threshold to its proper value. Furthermore, it was determined that if dilute oxygen is used, it is possible to avoid undue oxidation of the underlying semiconductor substrate which would have a deleterious effect on the capacitance of the final metal-containing gate stack.
    Type: Application
    Filed: April 29, 2005
    Publication date: November 2, 2006
    Applicant: International Business Machines Corporation
    Inventors: Eduard Cartier, Matthew Copel, Supratik Guha, Richard Haight, Fenton McFeely, Vijay Narayanan
  • Publication number: 20060224008
    Abstract: A method and system for refurbishing a metal carbonyl precursor. The method includes providing a metal precursor vaporization system containing a metal carbonyl precursor containing un-reacted and partially reacted metal carbonyl precursor, flowing a CO-containing gas through the metal precursor vaporization system to a precursor collection system in fluid communication with the metal precursor vaporization system to transfer the un-reacted metal carbonyl precursor vapor to the precursor collection system, and collecting the transferred metal carbonyl precursor in the precursor collection system. A method is provided for monitoring at least one metal carbonyl precursor parameter to determine a status of the metal carbonyl precursor and the need for refurbishing the metal carbonyl precursor.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Inventors: Kenji Suzuki, Gerrit Leusink, Fenton McFeely
  • Publication number: 20060182886
    Abstract: A method and system for improved delivery of a solid precursor. A chemically inert coating is provided on system components in a precursor delivery line to reduce decomposition of a relatively unstable precursor vapor in the precursor delivery line, thereby allowing increased delivery of the precursor vapor to a processing zone for depositing a layer on a substrate. The solid precursor can, for example, be a ruthenium carbonyl or a rhenium carbonyl. The inert coating can, for example, be a CxFy-containing polymer, such as polytetrafluoroethylene or ethylene-chlorotrifluoroethylene. Other benefits of using an inert coating include easy periodic cleaning of deposits from the precursor delivery line.
    Type: Application
    Filed: February 15, 2005
    Publication date: August 17, 2006
    Inventors: Emmanuel Guidotti, Kenji Suzuki, Gerrit Leusink, Fenton McFeely
  • Publication number: 20060163630
    Abstract: A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 ? in a p-metal oxide semiconductor (pMOS) device.
    Type: Application
    Filed: January 13, 2005
    Publication date: July 27, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alessandro Callegari, Michael Gribelyuk, Dianne Lacey, Fenton McFeely, Katherine Saenger, Sufi Zafar
  • Publication number: 20060151846
    Abstract: A compound metal comprising HfSiN which is a n-type metal having a workfunction of about 4.0 to about 4.5, preferably about 4.3, eV which is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer. Furthermore, after annealing the stack of HfSiN/high k dielectric/interfacial layer at a high temperature (on the order of about 1000° C.), there is a reduction of the interfacial layer, thus the gate stack produces a very small equivalent oxide thickness (12 ? classical), which cannot be achieved using TaSiN.
    Type: Application
    Filed: January 13, 2005
    Publication date: July 13, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Alessandro Callegari, Martin Frank, Rajarao Jammy, Dianne Lacey, Fenton McFeely, Sufi Zafar
  • Publication number: 20060138603
    Abstract: A method of fabricating hafnium oxide and/or zirconium oxide films is provided. The methods include providing a mixture of Hf and/or Zr alkoxide dissolved, emulsified or suspended in a liquid; vaporizing at least the alkoxide and depositing the vaporized component at a temperature of greater than 400° C. The resultant film is dense, microcrystalline and is capable of self-passivation when treated in a hydrogen plasma or forming gas anneal.
    Type: Application
    Filed: November 17, 2005
    Publication date: June 29, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cyril Cabral, Alessandro Callegari, Michael Gribelyuk, Paul Jamison, Dianne Lacey, Fenton McFeely, Vijay Narayanan, Deborah Neumayer, Pushkar Ranade, Sufi Zafar
  • Publication number: 20060115593
    Abstract: In a solid precursor evaporation system configured for use in a thin film deposition system, such as thermal chemical vapor deposition (TCVD), a method for preparing one or more trays of solid precursor is described. The solid precursor may be formed on a coating substrate, such as a tray, using one or more of dipping techniques, spin-on techniques, and sintering techniques.
    Type: Application
    Filed: December 9, 2004
    Publication date: June 1, 2006
    Inventors: Kenji Suzuki, Emmanuel Guidotti, Gerrit Leusink, Masamichi Hara, Daisuke Kuroiwa, Sandra Malhotra, Fenton McFeely, Robert Young
  • Publication number: 20060115590
    Abstract: A method for depositing metal layers, such as Ruthenium, on semiconductor substrates by a thermal chemical vapor deposition (TCVD) process includes introducing a metal carbonyl precursor in a deposition system, and depositing a metal layer from the metal carbonyl on a substrate. The TCVD process utilizes a short residence time for the gaseous species in the processing zone above the substrate to form a low-resistivity metal layer. In the deposition system, the metal carbonyl is evaporated in a solid precursor evaporation system, and the precursor vapor is transported to the process chamber via a vapor delivery system. Further, an in-situ cleaning system is coupled to the vapor delivery system in order to perform periodic cleaning of the deposition system. Periodic in-situ cleaning permits achieving a greater deposition rate by operating the deposition system at higher temperature where precursor vapor can decompose and potentially deposit on surfaces of the deposition system.
    Type: Application
    Filed: November 29, 2004
    Publication date: June 1, 2006
    Inventors: Kenji Suzuki, Gerrit Leusink, Fenton McFeely, Sandra Malhotra
  • Publication number: 20060110530
    Abstract: A method for increasing deposition rates of metal layers from metal-carbonyl precursors by mixing a vapor of the metal-carbonyl precursor with CO gas. The method includes providing a substrate in a process chamber of a deposition system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, and exposing the substrate to the process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.
    Type: Application
    Filed: November 23, 2004
    Publication date: May 25, 2006
    Inventors: Kenji Suzuki, Emmanuel Guidotti, Gerrit Leusink, Fenton McFeely, Sandra Malhotra
  • Publication number: 20060068588
    Abstract: A method for depositing Ru and Re metal layers on substrates with high deposition rates, low particulate contamination, and good step coverage on patterned substrates is presented. The method includes providing a substrate in a process chamber, introducing a process gas in the process chamber in which the process gas comprises a carrier gas and a metal precursor selected from the group consisting of a ruthenium-carbonyl precursor and a rhenium-carbonyl precursor. The method further includes depositing a Ru or Re metal layer on the substrate by a thermal chemical vapor deposition process at a process chamber pressure less than about 20 mTorr.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Applicants: Tokyo Electron Limited, International Business Machines Corporation
    Inventors: Hideaki Yamasaki, Kenji Suzuki, Emmanuel Guidotti, Enrico Mosca, Gert Leusink, Yumiko Kawano, Fenton McFeely, Sandra Malhotra
  • Publication number: 20060068097
    Abstract: A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.
    Type: Application
    Filed: September 30, 2004
    Publication date: March 30, 2006
    Applicants: TOKYO ELECTRON LIMITED, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hideaki Yamasaki, Kazuhito Nakamura, Yumiko Kawano, Gert Leusink, Fenton McFeely, Paul Jamison
  • Publication number: 20050280105
    Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
    Type: Application
    Filed: June 22, 2004
    Publication date: December 22, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wanda Andreoni, Alessandro Callegari, Eduard Cartier, Alessandro Curioni, Christopher D'Emic, Evengi Gousev, Michael Gribelyuk, Paul Jamison, Rajarao Jammy, Dianne Lacey, Fenton McFeely, Vijay Narayanan, Carlo Pignedoli, Joseph Shepard, Sufi Zafar
  • Publication number: 20050269708
    Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.
    Type: Application
    Filed: July 5, 2005
    Publication date: December 8, 2005
    Inventors: Panayotis Andricacos, Steven Boettcher, Fenton McFeely, Milan Paunovic
  • Publication number: 20050260833
    Abstract: A deposition member adapted for discharging a deposition material during a deposition process can acquire a coating during the deposition. Such an initial emissivity value is selected for the deposition member, before any of the coating became deposited, that the emissivity of the deposition member remains substantially unchanged during the deposition process. In a representative embodiment the deposition member is coated with an appropriate thin layer for achieving the selected emissivity value.
    Type: Application
    Filed: May 22, 2004
    Publication date: November 24, 2005
    Inventors: Fenton McFeely, John Yurkas, Sandra Malhotra, Andrew Simon
  • Publication number: 20050250318
    Abstract: Compounds of Ta and N, potentially including further elements, and with a resistivity below about 20 m?cm and with the elemental ratio of N to Ta greater than about 0.9 are disclosed for use as gate materials in field effect devices. A representative embodiment of such compounds, TaSiN, is stable at typical CMOS processing temperatures on SiO2 containing dielectric layers and high-k dielectric layers, with a workfunction close to that of n-type Si. Metallic Ta—N compounds are deposited by a chemical vapor deposition method using an alkylimidotris(dialkylamido)Ta species, such as tertiaryamylimidotris(dimethylamido)Ta (TAIMATA), as Ta precursor. The deposition is conformal allowing for flexible introduction of the Ta—N metallic compounds into a CMOS processing flow. Devices processed with TaN or TaSiN show near ideal characteristics.
    Type: Application
    Filed: July 13, 2005
    Publication date: November 10, 2005
    Inventors: Vijay Narayanan, Fenton McFeely, Keith Milkove, John Yurkas, Matthew Copel, Paul Jamison, Roy Carruthers, Cyril Cabral, Edmund Sikorskii, Elizabeth Duch, Alessandro Callegari, Sufi Zafar, Kazuhito Nakamura
  • Publication number: 20050227441
    Abstract: A method for forming a tantalum-containing gate electrode structure by providing a substrate having a high-k dielectric layer thereon in a process chamber and forming a tantalum-containing layer on the high-k dielectric layer in a thermal chemical vapor deposition process by exposing the substrate to a process gas containing TAIMATA (Ta(N(CH3)2)3(NC(C2H5)(CH3)2)) precursor gas. In one embodiment of the invention, the tantalum-containing layer can include a TaSiN layer formed from a process gas containing TAIMATA precursor gas, a silicon containing gas, and optionally a nitrogen-containing gas. In another embodiment of the invention, a TaN layer is formed on the TaSiN layer. The TaN layer can be formed from a process gas containing TAIMATA precursor gas and optionally a nitrogen-containing gas. A computer readable medium executable by a processor to cause a processing system to perform the method and a processing system for forming a tantalum-containing gate electrode structure are also provided.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Inventors: Kazuhito Nakamura, Hideaki Yamasaki, Yumiko Kawano, Gert Leusink, Fenton McFeely, John Yurkas, Vijay Narayanan