Abstract: A new technique for Hard Disk Drive (HDD) servo-burst demodulation is provided. A 4-samples per dibit Discrete Fourier Transform (DFT) amplitude estimation is used to calculate the read-head servo-position error signal. Comparatively, the conventional method of burst demodulation—called burst integration—typically uses more than 8 samples/dibit. Consequently, the new 4-samples/dibit DFT burst-demodulation scheme requires fewer samples per dibit than does burst integration, thus reducing the disk space occupied by the burst data while increasing the performance as compared to burst integration. Furthermore, the DFT scheme does not require the samples to be synchronized to any particular points of the servo burst, and can include an averaging algorithm that further improves performance for a given Signal to Noise Ratio (SNR). Moreover, the same sample-clocking circuit that detects the Gray Code servo information can also implement the DFT burst-demodulation scheme to demodulate the servo burst.

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and 4/12 rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery.

Abstract: A Viterbi detector receives a signal that represents a binary sequence having groups of no more and no fewer than a predetermined number of consecutive bits each having a first logic level, where the groups are separated from each other by respective bits having a second logic level. The Viterbi detector recovers the binary sequence from the signal by calculating a respective path metric for each of no more than four possible states of the binary sequence, and determining a surviving path from the calculated path metrics, where the binary sequence lies along the surviving path. Or, the Viterbi detector recovers the binary sequence from the signal by calculating respective path metrics for possible states of the binary sequence, calculating multiple path metrics for no more than one of the possible states, and determining the surviving path from the calculated path metrics.

Abstract: A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and {fraction (4/12)} rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery.

Abstract: A new technique for Hard Disk Drive (HDD) servo-burst demodulation is provided. A 4-samples per dibit Discrete Fourier Transform (DFT) amplitude estimation is used to calculate the read-head servo-position error signal. Comparatively, the conventional method of burst demodulation—called burst integration—typically uses more than 8 samples/dibit. Consequently, the new 4-samples/dibit DFT burst-demodulation scheme requires fewer samples per dibit than does burst integration, thus reducing the disk space occupied by the burst data while increasing the performance as compared to burst integration. Furthermore, the DFT scheme does not require the samples to be synchronized to any particular points of the servo burst, and can include an averaging algorithm that further improves performance for a given Signal to Noise Ratio (SNR). Moreover, the same sample-clocking circuit that detects the Gray Code servo information can also implement the DFT burst-demodulation scheme to demodulate the servo burst.

Abstract: A new technique incorporates a 1/4-rate Hard Disk Drive (HDD) servo-data encoding into a Partial Response Maximum Likelihood (PRML) read channel. The limitation of the HDD servo-track writer is the maximum frequency associated with writing the servo data while maintaining a level of data alignment between the data in the adjacent tracks (coherency). The 1/4 code allows the servo data to be written at the maximum coherency bandwidth. Specifically, the data is read back (or sampled) at twice the write frequency. This increases the data redundancy while also increasing the data density and the disk storage capacity. The 1/4 coding can also be applied to conventional HDD dibit coding. Specifically, the 1/4-coding scheme reads each dibit-coded servo-data transition 01 as 0011, and reads each non-transition 00 (or 0) as 0000. The 1/4 coding and its matched Viterbi detector can also increase the data detection in comparison to conventional peak-detection schemes.

Abstract: A hard disc drive having a digital servo system for controlling the position of a servo head on a dedicated servo surface. The servo surface is formatted in a series of consecutive frames along concentric tracks, each frame passing the servo head in a time that defines a sampling interval for the servo system. The frames contain track address and position fields for locating the servo head and location can be effected in relation to limited or extended fine control regions about the tracks via signals transmitted to a position circuit utilized to generate a servo position error from the position field. The position circuit generates a track phase code for checking track addresses generated by a track address circuit used to generate a track address from the address field.