Patents by Inventor Fernando G. Martinez

Fernando G. Martinez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Prototype development system and method
    Patent number: 6618842
    Abstract: A prototype development apparatus includes a logic board (LB) including a plurality of integrated circuit (IC) sites each adapted to receive an IC, logic traces coupled to each of the IC sites, and a plurality of logic board connector sites (LBCSs) configured to provide access to a number of the logic traces and each adapted to receive a connector. Additionally, a mezzanine board (MB) has a plurality of mezzanine board connector sites (MBCSs) each adapted to receive a connector and configured to provide access to a number of mezzanine traces interconnecting the LBCSs. The MB board is coupled to the LB and a portion of the logic traces are coupled to a portion of the mezzanine traces. In another embodiment the MB does not have any active components. This is because in this embodiment, the MB is configured to connect the pins of the connector sites according to a predetermined program.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: September 9, 2003
    Assignee: NVIDIA Corporation
    Inventors: Ernest P. Vogel, Sam J. Nicolino, Jr., Robert J. Hasslen, III, Fernando G. Martinez
  • Prototype development system
    Patent number: 6502221
    Abstract: A prototype development apparatus includes a logic board (LB) including a plurality of integrated circuit (IC) sites each adapted to receive an IC, logic traces coupled to each of the IC sites, and a plurality of logic board connector sites (LBCSs) configured to provide access to a number of the logic traces and each adapted to receive a connector. Additionally, a mezzanine board (MB) has a plurality of mezzanine board connector sites (MBCSs) each adapted to receive a connector and configured to provide access to a number of mezzanine traces interconnecting the LBCSs. The MB board is coupled to the LB and a portion of the logic traces are coupled to a portion of the mezzanine traces. In another embodiment the MB does not have any active components. This is because in this embodiment, the MB is configured to connect the pins of the connector sites according to a predetermined program.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: December 31, 2002
    Assignee: Nvidia Corporation
    Inventors: Ernest P. Vogel, Sam J. Nicolino, Jr., Robert J. Hasslen, III, Fernando G. Martinez
  • Prototype development system and method
    Publication number: 20020131244
    Abstract: A prototype development apparatus includes a logic board (LB) including a plurality of integrated circuit (IC) sites each adapted to receive an IC, logic traces coupled to each of the IC sites, and a plurality of logic board connector sites (LBCSs) configured to provide access to a number of the logic traces and each adapted to receive a connector. Additionally, a mezzanine board (MB) has a plurality of mezzanine board connector sites (MBCSs) each adapted to receive a connector and configured to provide access to a number of mezzanine traces interconnecting the LBCSs. The MB board is coupled to the LB and a portion of the logic traces are coupled to a portion of the mezzanine traces. In another embodiment the MB does not have any active components. This is because in this embodiment, the MB is configured to connect the pins of the connector sites according to a predetermined program.
    Type: Application
    Filed: October 26, 2001
    Publication date: September 19, 2002
    Inventors: Ernest P. Vogel, Sam J. Nicolino, Robert J. Hasslen, Fernando G. Martinez