Patents by Inventor Fernando Giovanni Menta

Fernando Giovanni Menta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230326995
    Abstract: The present disclosure is directed to a vertical-channel semiconductor device. For manufacturing the vertical-channel semiconductor device, starting from a work wafer having a first side and a second side opposite to the first side along a direction, a first doped region is formed in the work wafer, from the second side of the work wafer. The work wafer has a first conductivity type and a first doping level, the first doped region has the first conductivity type and a second doping level higher than the first doping level. A device active region having a channel region extending in the direction is formed in the work wafer, on the first side of the work wafer. The first doped region and the device active region delimit, in the work wafer, a drift region. The first doped region is formed before the device active region.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 12, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Sebastiano AMARA, Fernando Giovanni MENTA, Salvatore PISANO
  • Patent number: 10734476
    Abstract: An integrated electronic device forming a power device and including: a semiconductor body; a first conductive region and a second conductive region, which extend over the semiconductor body, the second conductive region surrounding the first conductive region at a distance; and an edge termination structure, which is arranged between the first and second conductive regions and includes a dielectric region, which delimits an active area of the power device, and a semiconductive structure, which extends over the dielectric region and includes a plurality of diode chains, each diode chain including a plurality of first semiconductive regions of a first conductivity type and a plurality of second semiconductive regions of a second conductivity type, the first and second semiconductive regions being arranged in alternating fashion so as to form a series circuit including a plurality of first and second diodes, which are spaced apart from one another and have opposite orientations.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: August 4, 2020
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Fernando Giovanni Menta, Salvatore Pisano
  • Publication number: 20190148483
    Abstract: An integrated electronic device forming a power device and including: a semiconductor body; a first conductive region and a second conductive region, which extend over the semiconductor body, the second conductive region surrounding the first conductive region at a distance; and an edge termination structure, which is arranged between the first and second conductive regions and includes a dielectric region, which delimits an active area of the power device, and a semiconductive structure, which extends over the dielectric region and includes a plurality of diode chains, each diode chain including a plurality of first semiconductive regions of a first conductivity type and a plurality of second semiconductive regions of a second conductivity type, the first and second semiconductive regions being arranged in alternating fashion so as to form a series circuit including a plurality of first and second diodes, which are spaced apart from one another and have opposite orientations.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 16, 2019
    Inventors: Fernando Giovanni MENTA, Salvatore PISANO
  • Patent number: 10115811
    Abstract: A vertical channel semiconductor device including: a semiconductor body including a substrate having a first conductivity type and a front layer having a second conductivity type; a first portion of trench and a second portion of trench; and, within the first and second portions of trench, a corresponding conductive region and a corresponding insulating layer. The first and second portions of trench delimit laterally a first semiconductor region and a second semiconductor region, the first semiconductor region having a maximum width greater than the maximum width of the second semiconductor region. The device further includes an emitter region having the first conductivity type, which extends in the front layer and includes: a full portion, which extends in the second semiconductor region; and an annular portion, which extends in the first semiconductor region. The annular portion laterally surrounds a top region having the second conductivity type.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 30, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Fernando Giovanni Menta, Salvatore Pisano
  • Publication number: 20180122926
    Abstract: A vertical channel semiconductor device including: a semiconductor body including a substrate having a first conductivity type and a front layer having a second conductivity type; a first portion of trench and a second portion of trench; and, within the first and second portions of trench, a corresponding conductive region and a corresponding insulating layer. The first and second portions of trench delimit laterally a first semiconductor region and a second semiconductor region, the first semiconductor region having a maximum width greater than the maximum width of the second semiconductor region. The device further includes an emitter region having the first conductivity type, which extends in the front layer and includes: a full portion, which extends in the second semiconductor region; and an annular portion, which extends in the first semiconductor region. The annular portion laterally surrounds a top region having the second conductivity type.
    Type: Application
    Filed: March 30, 2017
    Publication date: May 3, 2018
    Inventors: Fernando Giovanni Menta, Salvatore Pisano