Patents by Inventor Fernando Guarin

Fernando Guarin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10126354
    Abstract: CMOS switching devices are connected to testing equipment that applies AC to stress the CMOS switching devices. The testing equipment varies rise and fall times of drain and gate voltages, and varies offsets of the drain and gate voltages of the CMOS switching devices. The amount of hot carrier injection (HCI) within the CMOS switching devices is measured when the rise and fall times of the drain and gate voltages cross over, to establish AC HCI contribution to device degradation of the CMOS switching devices. Further, these methods can correlate the AC HCI contribution of the CMOS switching devices to CMOS logic devices based on ring oscillator (RO) degradation of ROs similarly tested or simulated, to produce AC HCI contribution for the CMOS logic devices.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 13, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Andreas Kerber, Tanya Nigam, Fernando Guarin
  • Patent number: 7723824
    Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (VCB of less than 1 V).
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: May 25, 2010
    Assignee: International Business Machines Corporation
    Inventors: Fernando Guarin, J. Edwin Hostetter, Jr., Stewart E. Rauch, III, Ping-Chuan Wang, Zhijian J. Yang
  • Publication number: 20070205434
    Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (VCB of less than 1 V).
    Type: Application
    Filed: May 4, 2007
    Publication date: September 6, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fernando Guarin, J. Hostetter, Stewart Rauch, Ping-Chuan Wang, Zhijian Yang
  • Patent number: 7238565
    Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (V?CB of less than 1 V).
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: July 3, 2007
    Assignee: International Business Machines Corporation
    Inventors: Fernando Guarin, J. Edwin Hostetter, Jr., Stewart E. Rauch, III, Ping-Chuan Wang, Zhijian J. Yang
  • Publication number: 20060118912
    Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (V?CB of less than 1 V).
    Type: Application
    Filed: December 8, 2004
    Publication date: June 8, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fernando Guarin, J. Hostetter, Stewart Rauch, Ping-Chuan Wang, Zhijian Yang
  • Publication number: 20050116739
    Abstract: A recovery circuit and a method for employing the same are provided. The recovery circuit has a current driver and, preferably two pass-gates, a first pass-gate connected in series to the current driver and a second pass-gate connected to a ground. The recovery circuit also has a recovery assembly or element and one or more contacts operatively connecting the recovery circuit to a wearout sensitive circuit or circuit element.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventors: Giuseppe Rosa, Joseph Lukaitis, Anastasios Katsetos, Stewart Rauch, Ping-Chuan Wang, Stephen Boffoli, Fernando Guarin, B. B. Lawhorn
  • Patent number: 6476632
    Abstract: A method of determining the effect of the degradation of MOSFET on the frequency of a Ring Oscillator (RO) consisting of an odd prime number of inverter stages, each of the inverters stages having an NMOS and a PMOS field-effect transistor is described.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: November 5, 2002
    Assignee: International Business Machines Corporation
    Inventors: Gluseppe La Rosa, Fernando Guarin, Kevin Kolvenbach, Stewart Rauch, III