Abstract: Apparatuses, methods, program products, and systems are presented for guided cable management. An apparatus includes a cable module that detects a first end of a cable installed at a port of a first node, a first port module that determines whether the cable that is installed at the port is an expected cable for the port based on a cable mapping table, and a first indicator module that triggers a visual indicator at the port to visually confirm that the cable is the expected cable for the port. The apparatus includes a second port module that determines a port of a second node where a second end of the cable is expected to be installed and a second indicator module that triggers a visual indicator at the port to visually indicate that the second end of the cable is expected to be installed in the port.

Abstract: Apparatuses, methods, program products, and systems are presented for guided cable management. An apparatus includes a cable module that detects a first end of a cable installed at a port of a first node, a first port module that determines whether the cable that is installed at the port is an expected cable for the port based on a cable mapping table, and a first indicator module that triggers a visual indicator at the port to visually confirm that the cable is the expected cable for the port. The apparatus includes a second port module that determines a port of a second node where a second end of the cable is expected to be installed and a second indicator module that triggers a visual indicator at the port to visually indicate that the second end of the cable is expected to be installed in the port.

Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Abstract: The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled at boot-time and, in response to detection of an additional adapter received after boot-time, an additional allocation of lanes to the additional adapter is dynamically controlled. The additional allocation includes allocating unallocated lanes to the additional adapter, and re-allocating at least one lane from the initial allocation in response to the unallocated lanes being insufficient.

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Abstract: The embodiments relate to dynamically allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each primary and backup adapter present, and controls an initial allocation of lanes to each detected primary adapter for maximizing adapter functionality. After the initial allocation and in response to detecting a failure of at least one primary adapter, the module dynamically switches lanes from the failed adapter to at least one of the one or more remaining primary adapters and the backup adapter.

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

Abstract: The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled at boot-time and, in response to detection of an additional adapter received after boot-time, an additional allocation of lanes to the additional adapter is dynamically controlled. The additional allocation includes allocating unallocated lanes to the additional adapter, and re-allocating at least one lane from the initial allocation in response to the unallocated lanes being insufficient.

Abstract: The embodiments relate to dynamically allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each primary and backup adapter present, and controls an initial allocation of lanes to each detected primary adapter for maximizing adapter functionality. After the initial allocation and in response to detecting a failure of at least one primary adapter, the module dynamically switches lanes from the failed adapter to at least one of the one or more remaining primary adapters and the backup adapter.

Abstract: The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system is configured with a plurality of connectors in communication with a module, with each connector configured to receive a respective adapter. The module detects a presence of each adapter and controls an initial allocation of lanes to each detected adapter for maximizing adapter functionality. After the initial allocation and in response to performance evaluation, the module dynamically switches lanes from the among the adapters, including allocation of available lane, upshifting lane allocation to one or more adapters, and/or downshifting lane allocation to one or more adapters.

Abstract: The embodiments relate to dynamically allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled, which includes the module controlling an allocation of the lanes to adapters present at boot-time. The allocation is dynamic and functions to maximize lane allocation and functionality for the detected adapters.