Patents by Inventor Fernando Quintana
Fernando Quintana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11710612Abstract: A molded case circuit breaker configured to protect its ports and cables is provided. The molded case circuit breaker comprises an electronic trip unit (ETU) including communication ports or a thermomagnetic trip unit (TMTU). The molded case circuit breaker further comprises a terminal cover configured to pass cables that connect to the communication ports of the ETU and pass the cables over lugs without touching the lugs. The molded case circuit breaker further comprises a cable box cover that protects the cables of the ETU from external harm. The terminal cover including an emboss fixture having emboss guides for alignment and fixing of the cable box cover. The electronic trip unit (ETU) or the thermomagnetic trip unit (TMTU) and the cable box cover are assembled with one or more screws. The cable box cover is prevented from falling after the one or more screws are taken out from the terminal cover regardless of how the circuit breaker is mounted.Type: GrantFiled: May 14, 2021Date of Patent: July 25, 2023Assignee: Siemens Industry, Inc.Inventors: Luis Fernando Quintana Ramos, Carlos Andres Espinosa Perez, Ismael Francisco Morales Trevino
-
Publication number: 20220367136Abstract: A molded case circuit breaker configured to protect its ports and cables is provided. The molded case circuit breaker comprises an electronic trip unit (ETU) including communication ports or a thermomagnetic trip unit (TMTU). The molded case circuit breaker further comprises a terminal cover configured to pass cables that connect to the communication ports of the ETU and pass the cables over lugs without touching the lugs. The molded case circuit breaker further comprises a cable box cover that protects the cables of the ETU from external harm. The terminal cover including an emboss fixture having emboss guides for alignment and fixing of the cable box cover. The electronic trip unit (ETU) or the thermomagnetic trip unit (TMTU) and the cable box cover are assembled with one or more screws. The cable box cover is prevented from falling after the one or more screws are taken out from the terminal cover regardless of how the circuit breaker is mounted.Type: ApplicationFiled: May 14, 2021Publication date: November 17, 2022Inventors: LUIS FERNANDO QUINTANA RAMOS, CARLOS ANDRES ESPINOSA PEREZ, ISMAEL FRANCISCO MORALES TREVINO
-
Publication number: 20110207120Abstract: The present invention comprises the use of WNT1 as a biomarker in the monitoring, prognosis and/or in the diagnosis of chronic nephropathies. It provides in vitro prognostic and diagnostic methods and kits for its implementation. The present invention also comprises the use of WNT1 in screening active ingredients for the manufacture of a drug for therapies for chronic nephropathies and a method for conducting said screening.Type: ApplicationFiled: August 12, 2009Publication date: August 25, 2011Applicant: HOSPITAL CLINIC I PROVINCIAL DE BARCELONAInventors: Elisenda BaƱon-maneus, Luis Fernando Quintana Porras, Josep Maria Campistol Plana
-
Patent number: 6664658Abstract: A power limiting system and method are provided for limiting power delivered to a common bus in a one or multi-frame tape library environment. The system includes one or more frames coupled to a common bus, each of which is capable of delivering power to the common bus. Each frame comprises current limiting circuitry to limit the power delivered by that frame to the common bus. In exemplary embodiments, the current limiting circuitry of each frame includes a current limiting resistor and a blocking diode coupled to a local power source to limit the power delivered by that frame and to prevent feedback respectively. Additionally, each frame of the system includes a relay capable of receiving a limited power from the common bus, being energized, and, consequently, providing for the respective frame to be powered by a main power supply.Type: GrantFiled: May 14, 2001Date of Patent: December 16, 2003Assignee: International Business Machines CorporationInventors: Michael Philip McIntosh, Fernando Quintana, Charles Anthony Thompson, Jr.
-
Publication number: 20020167226Abstract: A power limiting system and method are provided for limiting power delivered to a common bus in a one or multi-frame tape library environment. The system includes one or more frames coupled to a common bus, each of which is capable of delivering power to the common bus. Each frame comprises current limiting. circuitry to limit the power delivered by that frame to the common bus. In exemplary embodiments, the current limiting circuitry of each frame includes a current limiting resistor and a blocking diode coupled to a local power source to limit the power delivered by that frame and to prevent feedback respectively. Additionally, each frame of the system includes a relay capable of receiving a limited power from the common bus, being energized, and, consequently, providing for the respective frame to be powered by a main power supply.Type: ApplicationFiled: May 14, 2001Publication date: November 14, 2002Applicant: International Business Machines CorporationInventors: Michael Philip McIntosh, Fernando Quintana, Charles Anthony Thompson
-
Patent number: 6356803Abstract: A distributed control system is provided for an automated data storage library. The library accesses data storage media in response to received commands, and comprises an accessor having a gripper for accessing the data storage media, and an XY system having servo motors for moving the accessor and the gripper. The distributed control system comprises a communication processor node for receiving commands, providing a communication link for the commands. An accessor processor node, which may be located at the accessor, is coupled to the communication processor node, the accessor processor node responsive to the linked commands, operating the gripper and providing move commands. An XY processor node may be provided at the XY system, coupled to the accessor processor node, the XY processor node responsive to the move commands, operating the servo motors. A common bus couples the communication processor node to the accessor processor node, and couples the accessor processor node to the XY processor node.Type: GrantFiled: May 19, 2000Date of Patent: March 12, 2002Assignee: International Business Machines CorporationInventors: Brian Gerard Goodman, Leonard George Jesionowski, Michael Philip McIntosh, Fernando Quintana, Charles Anthony Thompson, Jr., Raymond Yardy
-
Patent number: 6061309Abstract: A method and apparatus is disclosed for maintaining states of an operator interface, such as an operator panel and convenience input/output station, of a dual library manager/dual controller system in the event of a failure to one controller during an operation. The invention allows control of the operator panel and convenience input/output station status lights and the states themselves by more than one controller without reinitializing at a default condition by detecting a failure during an operation, switching control to a second accessor controller and establishing a correct state for the operator interface via the second accessor controller. A correct state for a station is established by first establishing a fake empty status for the station and then locking the station, if necessary.Type: GrantFiled: December 17, 1997Date of Patent: May 9, 2000Assignee: International Business Machines CorporationInventors: Frank David Gallo, Kristy Colleen Judd, Anthony Andrew Lambert, Michael Pillip McIntosh, Fernando Quintana
-
Patent number: 5485476Abstract: An error tolerant detection of multibit synchronization characters within data blocks in a data storage system. Each detected prospective multibit synchronization character is compared to an expected multibit synchronization character for an identical match and for a match which includes a variation of no greater than two adjacent bits. A synchronization character is then considered to be identified in response to a successful exact comparison or, if relaxed detection is enabled, in response to a successful comparison indicating that the detected prospective multibit synchronization character does not differ from the expected multibit synchronization character by an error greater than two adjacent bits. For Read While Write operation in which it is imperative that the synchronization characters be written initially without error, the relaxed detection scheme may be selectively disabled, requiring the synchronization characters to achieve an exact match with the expected synchronization character.Type: GrantFiled: June 14, 1993Date of Patent: January 16, 1996Assignee: International Business Machines CorporationInventors: Sushama M. Paranjape, Fernando Quintana
-
Patent number: 5442491Abstract: A method and apparatus which first calculates track to track skew in a tape device and then uses the results of that calculation to adjust the windows for detection of sync and resync characters. The system makes use of global circuitry which adjusts the sync and resync windows for all tracks based upon the skew calculation. In the case of the windows used for detecting resyncs, when skew is determined to be large, the global resync window must span a larger time period to account for the skew in detecting resync marks. Conversely, when there is little or no skew present, the windows for resync detection can be narrowed. Normally, the track logic utilizes its own local windows to detect resyncs. If a track misses a resync, however, it must use the global resync window to determine the next resync location. Once the tracks are resynchronized, control can return to local track circuitry to maintain synchronization.Type: GrantFiled: July 13, 1994Date of Patent: August 15, 1995Assignee: International Business Machines CorporationInventors: Charles E. Bailey, Steven R. Bentley, Sushama M. Paranjape, Fernando Quintana, Stephen C. West
-
Patent number: 5408366Abstract: An apparatus and method for detecting and validating formatted blocks during read/write data operations in a magnetic tape data storage system includes component functionality for reading and writing data on a magnetic tape medium in a plurality of modes, including a read-only (R) mode and a read-while-write (RWW) mode, the data being arranged in one or more tracks in a sequence of formatted blocks. In preferred embodiments, formatted block detection and validation is performed by appropriate logic circuitry configured to detect at least one formatting entity representing an inter-block gap, a block acquisition burst, a synchronization character, or any other desired formatting entity, using first and second programmable detection thresholds that are the same or substantially the same in both the R and RWW modes.Type: GrantFiled: June 14, 1993Date of Patent: April 18, 1995Assignee: International Business Machines CorporationInventors: Steven R. Bentley, Rickey W. Murray, Sushama M. Paranjape, Fernando Quintana
-
Patent number: 5379161Abstract: A method and system for locating and predicting synchronization characters within data blocks stored within multiple tracks on a removable data storage medium in a data storage system. The location and identity of each diverse synchronization character within multiple data blocks is predicted in response to an identification of an initial acquisition character and an identification of a particular data storage format. A first synchronization character is predicted and a synchronization counter is then incremented in response to a detection of each subsequent synchronization character, or, in response to the elapse of one of two predetermined delay periods. A system clock delay period is initiated immediately after each synchronization character is detected and the synchronization counter is then incremented at the end of that delay period. A second delay period is initiated thereafter, utilizing a derived track clock signal, which is reasonably insensitive to variations in storage media transport speed.Type: GrantFiled: June 14, 1993Date of Patent: January 3, 1995Assignee: International Business Machines CorporationInventor: Fernando Quintana
-
Patent number: 5373401Abstract: A method and system for accurately reading and storing data as multiple data blocks on a removable data storage medium mounted within a data storage system. Each data block includes an initial acquisition data character and multiple diverse synchronization characters/bursts and adjacent data blocks are separated by a unique interblock gap character. A multimodal interblock gap character detection circuit is provided which may operate in a normal mode of operation or a stringent mode of operation, wherein an enhanced degree of certainty is required for detection of the interblock gap character. A predicted time window of occurrence for a next interblock gap character is generated in response to detection of an initial acquisition data character and at least one synchronization character within a data block. Additionally, a global clock count signal based upon multiple track outputs is generated each time a resynchronization burst is encountered.Type: GrantFiled: June 18, 1993Date of Patent: December 13, 1994Assignee: International Business Machines CorporationInventors: Steven R. Bentley, Sushama M. Paranjape, Fernando Quintana, Stephen C. West
-
Patent number: 5357380Abstract: A method and apparatus which first calculates track to track skew in a tape device and then uses the results of that calculation to adjust the windows for detection of sync and resync characters. The system makes use of global circuitry which adjusts the sync and resync windows for all tracks based upon the skew calculation. In the case of the windows used for detecting resyncs, when skew is determined to be large, the global resync window must span a larger time period to account for the skew in detecting resync marks. Conversely, when there is little or no skew present, the windows for resync detection can be narrowed. Normally, the track logic utilizes its own local windows to detect resyncs. If a track misses a resync, however, it must use the global resync window to determined the next resync location. Once the tracks are resynchronized, control can return to local track circuitry to maintain synchronization.Type: GrantFiled: June 14, 1993Date of Patent: October 18, 1994Assignee: International Business Machines CorporationInventors: Charles E. Bailey, Steven R. Bentley, Sushama M. Paranjape, Fernando Quintana, Stephen C. West