Abstract: Integrated circuit device having a processor module (2) in communication with a cache memory module (3, 4), and one or more memory control modules (6, 8, 10) each arranged to interface with an associated storage memory unit (5, 7, 9). An authentication module (15) is provided in communication with the memory control modules (6, 8, 10) and the cache memory modules (3, 4). The authentication module (15) is arranged to generate and store a hardware based secure key, read a predetermined set of data from the associated storage memory units (5, 7, 9), and an associated stored hash value, calculate a hash value of the predetermined set of data using the hardware based secure key; and store the predetermined set of data in the cache memory module (3, 4) only if the calculated hash value corresponds to the associated stored hash value.

Abstract: Integrated circuit device having a processor module (2) in communication with a cache memory module (3, 4), and one or more memory control modules (6, 8, 10) each arranged to interface with an associated storage memory unit (5, 7, 9). An authentication module (15) is provided in communication with the memory control modules (6, 8, 10) and the cache memory modules (3, 4). The authentication module (15) is arranged to generate and store a hardware based secure key, read a predetermined set of data from the associated storage memory units (5, 7, 9), and an associated stored hash value, calculate a hash value of the predetermined set of data using the hardware based secure key; and store the predetermined set of data in the cache memory module (3, 4) only if the calculated hash value corresponds to the associated stored hash value.

Abstract: Integrated circuit comprising one or more components (2; 2A-2G), each comprising embedded circuitry (21-31) allowing run-time execution of a micro-agent, and an interface to an agent network (4) (next to a data network (3) and a supply network (5)) interconnecting the one or more components (2; 2A-2G). The micro-agent is arranged to determine a signature of the associated component (2; 2A-2G), to communicate via the agent network (4) with further connected micro-agents being executed in further ones of the one or more components (2; 2A-2G) of the integrated circuit (1), and to detect a possible attack by analysing the determined signature.