Abstract: A digital compensation circuit for calibrating a sensor is described. The compensator circuit includes a serial communication circuit for receiving data relating to a plurality of parameters and a compensation circuit coupled to serial communication circuit for providing piece-wise linear compensation of a temperature coefficient (TC). In one embodiment, the compensation circuit further includes a detector for detecting a threshold for a digital temperature and providing an output and a plurality of registers coupled to the detector and the serial communication circuit, a first plurality of registers for providing a first value if the digital temperature is above the threshold, a second of the plurality of registers for providing a second value if the digital temperature is below the threshold.

Abstract: A digital compensation circuit for calibrating a sensor includes a serial communication circuit for receiving data relating to a plurality of parameters and a plurality of registers coupled to the serial communication circuit; one of plurality of registers for reading temperature information. The digital compensation circuit further includes a digital trim circuit for adjusting the temperature information in the one of plurality of registers to a predetermined value at an initial calibration temperature. Finally, the digital compensation circuit further includes means responsive to the digital trim circuit for measuring gain and offset at a predetermined value of the physical parameter being measured.

Abstract: A differential comparator with inputs switched and capacitively coupled to inverters which have capacitive cross-coupling feedback for a latching operation. The inverters also have direct switched feedback for autozeroing. The inputs further have a shorting switch between the input switches and the coupling capacitors for offset compensation. Complementary operation of the switches provides precharge and evaluation phases of operation. During precharge the inputs are applied to the input coupling capacitors and the inverters are autozeroed; during evaluation the inputs are transferred to the inverters through the coupling capacitors and the outputs feedback positively through the cross-coupling capacitors to latch the pair of inverters.

Abstract: This invention relates to a capacitive switching network for producing signals of opposite polarity. In one embodiment of the invention, a first signal (V1) is applied to the first plate of a first capacitor (C1) and a second signal (V2) is applied to the first plate of a second capacitor (C2). The first plates of the first and second capacitors are then shorted together to produce a combined voltage (Vc). The generation of Vc causes an AC voltage equal to (Vc-V1) to be produced at the second plate of C1 and an AC voltage equal to (Vc-V2) to be produced at the second plate of C2. By way of example, for C1 equal to C2, there is produced a Vc equal to (V1+V2)/2. Furthermore, if V1 is greater than V2, a negative going AC signal equal to (VC-V1) is produced at the second plate of C1, and a positive going AC signal equal to (Vc-V2) is produced at the second plate of C2. The capacitive network of the invention is highly suited for use in high speed differential comparators.