Patents by Inventor Florian DOMENGIE

Florian DOMENGIE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190259618
    Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. The metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition with process parameters selected so as to produce grains of material exhibiting a uniaxial grain orientation. The uniaxial grain structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 22, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Florian Domengie, Pushpendra Kumar
  • Patent number: 10261252
    Abstract: A photonic integrated circuit includes an optical coupling device situated between two successive interconnection metal levels. The optical coupling device includes a first optical portion that receives an optical signal having a transverse electric component in a fundamental mode and a transverse magnetic component. A second optical portion converts the transverse magnetic component of the optical signal into a converted transverse electric component in a higher order mode. A third optical portion separates the transverse electric component from the converted transverse electric component and switches the higher order mode to the fundamental mode. A fourth optical portion transmits the transverse electric component to one waveguide and transmits the converted transverse electric component to another waveguide.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: April 16, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sylvain Guerber, Charles Baudot, Florian Domengie
  • Patent number: 10211059
    Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: February 19, 2019
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Pierre Caubet, Florian Domengie, Carlos Augusto Suarez Segovia, Aurelie Bajolet, Onintza Ros Bengoechea
  • Publication number: 20190018191
    Abstract: A photonic integrated circuit includes an optical coupling device situated between two successive interconnection metal levels. The optical coupling device includes a first optical portion that receives an optical signal having a transverse electric component in a fundamental mode and a transverse magnetic component. A second optical portion converts the transverse magnetic component of the optical signal into a converted transverse electric component in a higher order mode. A third optical portion separates the transverse electric component from the converted transverse electric component and switches the higher order mode to the fundamental mode. A fourth optical portion transmits the transverse electric component to one waveguide and transmits the converted transverse electric component to another waveguide.
    Type: Application
    Filed: September 17, 2018
    Publication date: January 17, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Sylvain Guerber, Charles Baudot, Florian Domengie
  • Patent number: 10101528
    Abstract: A photonic integrated circuit includes an optical coupling device situated between two successive interconnection metal levels. The optical coupling device includes a first optical portion that receives an optical signal having a transverse electric component in a fundamental mode and a transverse magnetic component. A second optical portion converts the transverse magnetic component of the optical signal into a converted transverse electric component in a higher order mode. A third optical portion separates the transverse electric component from the converted transverse electric component and switches the higher order mode to the fundamental mode. A fourth optical portion transmits the transverse electric component to one waveguide and transmits the converted transverse electric component to another waveguide.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: October 16, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Sylvain Guerber, Charles Baudot, Florian Domengie
  • Publication number: 20180239088
    Abstract: A photonic integrated circuit includes an optical coupling device situated between two successive interconnection metal levels. The optical coupling device includes a first optical portion that receives an optical signal having a transverse electric component in a fundamental mode and a transverse magnetic component. A second optical portion converts the transverse magnetic component of the optical signal into a converted transverse electric component in a higher order mode. A third optical portion separates the transverse electric component from the converted transverse electric component and switches the higher order mode to the fundamental mode. A fourth optical portion transmits the transverse electric component to one waveguide and transmits the converted transverse electric component to another waveguide.
    Type: Application
    Filed: August 31, 2017
    Publication date: August 23, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Sylvain Guerber, Charles Baudot, Florian Domengie
  • Publication number: 20170256625
    Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.
    Type: Application
    Filed: May 22, 2017
    Publication date: September 7, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Pierre Caubet, Florian Domengie, Carlos Augusto Suarez Segovia, Aurelie Bajolet, Onintza Ros Bengoechea
  • Patent number: 9691871
    Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: June 27, 2017
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Pierre Caubet, Florian Domengie, Carlos Augusto Suarez Segovia, Aurelie Bajolet, Onintza Ros Bengoechea
  • Publication number: 20170179250
    Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Pierre Caubet, Florian Domengie, Carlos Augusto Suarez Segovia, Aurelie Bajolet, Onintza Ros Bengoechea
  • Patent number: 9257518
    Abstract: At least one MOS transistor is produced by forming a dielectric region above a substrate and forming a gate over the dielectric region. The gate is formed to include a metal gate region. Formation of the metal gate region includes: forming a layer of a first material configured to reduce an absolute value of a threshold voltage of the transistor, and configuring a part of the metal gate region so as also to form a diffusion barrier above the layer of the first material. Then, doped source and drain regions are formed using a dopant activation anneal.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: February 9, 2016
    Assignee: STMicrolectronics (Crolles 2) SAS
    Inventors: Sylvain Baudot, Pierre Caubet, Florian Domengie
  • Patent number: 9029254
    Abstract: A method for forming an aluminum titanium nitride layer on a wafer by plasma-enhanced physical vapor deposition including a first step at a radio frequency power ranging between 100 and 500 W only, and a second step at a radio frequency power ranging between 500 and 1,000 W superimposed to a D.C. power ranging between 500 and 1,000 W. An insulated gate comprising such an aluminum titanium nitride layer.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: May 12, 2015
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Pierre Caubet, Florian Domengie, Sylvain Baudot
  • Publication number: 20140319616
    Abstract: At least one MOS transistor is produced by forming a dielectric region above a substrate and forming a gate over the dielectric region. The gate is formed to include a metal gate region. Formation of the metal gate region includes: forming a layer of a first material configured to reduce an absolute value of a threshold voltage of the transistor, and configuring a part of the metal gate region so as also to form a diffusion barrier above the layer of the first material. Then, doped source and drain regions are formed using a dopant activation anneal.
    Type: Application
    Filed: April 17, 2014
    Publication date: October 30, 2014
    Applicant: STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Sylvain Baudot, Pierre Caubet, Florian Domengie
  • Publication number: 20140097504
    Abstract: A method for forming an aluminum titanium nitride layer on a wafer by plasma-enhanced physical vapor deposition including a first step at a radio frequency power ranging between 100 and 500 W only, and a second step at a radio frequency power ranging between 500 and 1,000 W superimposed to a D.C. power ranging between 500 and 1,000 W. An insulated gate comprising such an aluminum titanium nitride layer.
    Type: Application
    Filed: September 20, 2013
    Publication date: April 10, 2014
    Inventors: Pierre CAUBET, Florian DOMENGIE, Sylvain BAUDOT