Patents by Inventor Florian FAISSOLE

Florian FAISSOLE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240419442
    Abstract: A computer implemented method for converting an input computer program into an output computer program having a target global accuracy discloses, including: receiving a target internal accuracy for each mathematical function included in the input computer program, analyzing the input computer program to determine a dependency graph describing dependencies between mathematical functions calls, the mathematical functions being processed according to the dependency graph by, for each processed mathematical function: using a value range determination tool to produce a value range for the processed mathematical function based on each synthesized mathematical function obtained for a mathematical function on which the processed mathematical function depends according to the dependency graph, using a synthesis tool to produce a synthesized mathematical function having the target internal accuracy, the output computer program being generated by replacing each mathematical function call by a call to its corresponding s
    Type: Application
    Filed: January 30, 2023
    Publication date: December 19, 2024
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Benoit BOYER, Florian FAISSOLE, Guillaume MELQUIOND
  • Publication number: 20240103479
    Abstract: The present invention is related to a method for checking correctness of a PLC program described by functional specifications typically presented as a timing chart. The method comprises: —S1: translating the PLC program into a model, —S2: translating the timing chart and integrating said timing chart into the model, —S3: computing abstract semantics, to infer information eventually missing in the timing chart, —S4: predicating transformation, and deducing properties to be verified, from the model and from predefined PLC formalized instructions, in order to satisfy timing chart verification, —S5: solving and checking whether said properties are always verified, or providing counter-examples, —S6: translating said counter-examples into PLC model errors events initial configurations, —S7: simulating execution, —S8: assembling states and events executions variables values, and —S9: translating back to PLC program.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 28, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Denis COUSINEAU, Florian FAISSOLE, David MENTRE, Hiroaki INOUE