Abstract: A digitally implemented demodulator. A frequency-modulated signal is applied to a limiting amplifier such that the signal amplitude is fixed at a constant level. The signal is undersampled and quadrature demodulated. The demodulator generates the cross-product of the baseband complex envelope to recover the original modulating signal. A digital Frequency Shift Keyed signal can be further recovered by applying the recovered signal to a data slicer to square-up the signal, and a matched filter for improved error resistance.

Abstract: The present disclosure discloses a method and apparatus for slicing data, or “squaring up” a signal such as the output of a wireless receiver demodulator for proper interface with conventional digital logic circuits. The method involves the receiving of an input signal, the generation of a reference level, the comparison of the input signal to the reference level, and the measurement and storage of the reference level. The reference level is generated by applying the input signal to a filter, which has been previously set to an initial condition. The reference level is measured at a predetermined point in a receive data frame, and is maintained at the desired level throughout the remainder of the frame. After a frame has been received, the reference level is stored if the frame data output from the data slicer contained no errors.