Abstract: An analog-to-digital converter (ADC) system configured to receive a first and a second analog quantity and to provide a plurality of numerical parameters representative of the first and second analog quantities. The ADC system includes a first, a second, and a third ADC circuit, and a digital interface circuit. The first ADC circuit is configured to provide a first code representative of the first analog quantity and to provide a first analog residue quantity representative of the first analog quantity with respect to the first code. The second ADC circuit is configured to provide a second code representative of the second analog quantity and to provide a second analog residue quantity representative of the second analog quantity with respect to the second code. The third ADC circuit is configured to receive the first and second analog residue quantities, and to provide a third digital code representative of a difference of the first and second analog residue quantities.

Abstract: An analog-to-digital converter (ADC) system configured to receive a first and a second analog quantity and to provide a plurality of numerical parameters representative of the first and second analog quantities. The ADC system includes a first, a second, and a third ADC circuit, and a digital interface circuit. The first ADC circuit is configured to provide a first code representative of the first analog quantity and to provide a first analog residue quantity representative of the first analog quantity with respect to the first code. The second ADC circuit is configured to provide a second code representative of the second analog quantity and to provide a second analog residue quantity representative of the second analog quantity with respect to the second code. The third ADC circuit is configured to receive the first and second analog residue quantities, and to provide a third digital code representative of a difference of the first and second analog residue quantities.

Abstract: A differential current steering (CS) circuit uses feedback from the differential output nodes A and B to cause current steering devices (e.g., MOSFETs) to effectively exhibit an infinite output impedance when conducting. Therefore, the signal on the output nodes A or B does not significantly change the voltage at the common node, This is particularly useful when the differential output nodes are connected to differential output buses in a digital-to-analog converter. The circuit dynamically cancels, though feedback, the signal induced at the common node by the signal present at the “steered” output node. Therefore, the CS circuit effectively presents an infinite output impedance between the common node and the output nodes. In some cases, it may be desirable to not create a substantially infinite output impedance for the CS circuit but control the impedance to a predefined level to counter other distortions in the system.

Abstract: A differential current steering (CS) circuit uses feedback from the differential output nodes A and B to cause current steering devices (e.g., MOSFETs) to effectively exhibit an infinite output impedance when conducting. Therefore, the signal on the output nodes A or B does not significantly change the voltage at the common node, This is particularly useful when the differential output nodes are connected to differential output buses in a digital-to-analog converter. The circuit dynamically cancels, though feedback, the signal induced at the common node by the signal present at the “steered” output node. Therefore, the CS circuit effectively presents an infinite output impedance between the common node and the output nodes. In some cases, it may be desirable to not create a substantially infinite output impedance for the CS circuit but control the impedance to a predefined level to counter other distortions in the system.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is sampled N1 times, a compression factor related at least in part to the ratio N1/(N+N1) is obtained.

Abstract: An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is sampled N1 times, a compression factor that is based at least in part on N1/(N+N1) is obtained.

Abstract: An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is sampled N1 times, a compression factor that is based at least in part on N1/(N+N1) is obtained.

Abstract: An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is sampled N1 times, a compression factor related at least in part to the ratio N1/(N+N1) is obtained.

Abstract: Novel system and methodology for sampling analog input signals to reduce an average common-mode input current caused by unbalanced nodes of an input signal source. An analog-to-digital (A/D) conversion system for converting an analog input signal supplied by a signal source having first and second nodes may have a first sampling circuit coupled to the first node for sampling the input signal with respect to a reference signal and configured so as to provide a substantially zero total charge taken from the first node during a first sampling process, and a second sampling circuit coupled to the second node for sampling the input signal with respect to the reference signal and configured so as to provide a substantially zero total charge taken from the second node during a second sampling process. In response to first and second output signals respectively produced by the first and second sampling circuits, an output circuit may provide common-mode rejection.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application of the foregoing is in analog-to-digital conversion.

Abstract: Novel system and methodology for sampling analog input signals to reduce an average common-mode input current caused by unbalanced nodes of an input signal source. An analog-to-digital (A/D) conversion system for converting an analog input signal supplied by a signal source having first and second nodes may have a first sampling circuit coupled to the first node for sampling the input signal with respect to a reference signal and configured so as to provide a substantially zero total charge taken from the first node during a first sampling process, and a second sampling circuit coupled to the second node for sampling the input signal with respect to the reference signal and configured so as to provide a substantially zero total charge taken from the second node during a second sampling process. In response to first and second output signals respectively produced by the first and second sampling circuits, an output circuit may provide common-mode rejection.

Abstract: The invention provides methods and apparatus for improving the direct current (DC) offset performance of an oversampling analog-to-digital (A/D) converter, including A/D converters that include an oversampling quantizer such as a single or multi-bit ?-? modulator, successive approximation quantizer, flash quantizer, pipelined quantizer or other suitable oversampling quantizer. A customized buffer/amplifier may be inserted between an analog chopper and a signal processing chain. The customized buffer/amplifier is optimized for input noise and the signal chain compensates for poor DC performance. The result is a buffered analog-to-digital converter with both low input noise and very good DC accuracy.

Abstract: The invention provides methods and apparatus for improving the direct current (DC) offset performance of an oversampling analog-to-digital (A/D) converter, including A/D converters that include an oversampling quantizer such as a single or multi-bit ?-? modulator, successive approximation quantizer, flash quantizer, pipelined quantizer or other suitable oversampling quantizer. A customized buffer/amplifier may be inserted between an analog chopper and a signal processing chain. The customized buffer/amplifier is optimized for input noise and the signal chain compensates for poor DC performance. The result is a buffered analog-to-digital converter with both low input noise and very good DC accuracy.

Abstract: The invention provides apparatus and methods for generating the coefficients of a finite impulse response digital filter used in signal sample rate conversion. Sequence generation circuitry provides a discrete-time sequence x(n) that is coupled to a plurality of cascaded discrete-time integrators that generate the filter coefficients h(n). Bit serial and interleaved bit serial implementations are described that provide efficient coefficient generators. The described apparatus and methods also may be used to efficiently implement a finite impulse response digital filter for an oversampling analog-to-digital converter.

Abstract: The invention provides methods and apparatus for improving the direct current (DC) offset performance of an oversampling analog-to-digital (A/D) converter, including A/D converters that include an oversampling quantizer such as a single or multi-bit &Dgr;-&Sgr; modulator, successive approximation quantizer, flash quantizer, pipelined quantizer or other suitable oversampling quantizer. The invention also relates to methods for providing a wide-band attenuation in the digital output of an A/D converter using a limited number of components.