Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A transmit wake up front-end architecture is embedded in a single chip for wireless systems which comprises a RF front end with an antenna port and a transmit-receive port. The RF front end comprises three alternate paths. These three alternate paths are enabled by two switch blocks namely input switch block and output switch block. A coupling resistor is connected from the directional coupler port to ground and isolated resistor is connected from the directional coupler isolation port to ground. An envelope detector is used which utilizes a high-frequency RF signal from a transceiver as input and provides an envelope of the original RF signal as an output and is connected to envelope amplifier. A threshold detector or circuitry is implemented in RF front-end wake up circuit connected to envelope amplifier. A logic control block is connected with the threshold circuitry switching operational modes in the RF front end.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A minor transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A system, method and apparatus for a portable fire container comprising a single piece of non-flammable material, wherein the container has a solid bottom portion, the container has a contiguous side portion at least six inches in height, the side portion has holes, the container is adapted to contain combustible material during the combustion, and the container is adapted to contain the resulting residual ashes and embers.

Abstract: A system, method and apparatus for a portable fire container comprising a single piece of non-flammable material, wherein the container has a solid bottom portion, the container has a contiguous side portion at least six inches in height, the side portion has holes, the container is adapted to contain combustible material during the combustion, and the container is adapted to contain the resulting residual ashes and embers.