Abstract: A method and system for improving ASIC routability is disclosed. In a first aspect of the present invention, the method and system include performing an initial cell placement process on an ASIC design; performing a global routing process and creating global routing data, including congestion data; and repeating the initial cell placement process using the congestion data as input, such that cell and routing density in the ASIC design is reduced, thereby reducing routing congestion. In a second aspect of the present invention, the method and system further include performing a placement refinement and buffer insertion process; performing a repeater removal process that uses the congestion data as input and removes buffers from the congested areas; and repeating the placement refinement process, such that global nets are routed around the congested areas.

Abstract: A memory system is implemented by an array of large scale integrated dynamic random access memory elements. The memory elements are of a type that permit data way word storage on a page basis, each page being defined on a row boundary. Discovering that excess power consumption by the memory can result from successive memory operations made back-to-back to different page locations, the present invention provides counter means to count each immediately successive different page memory operations so that, when that count matches a maximum count, memory operations are stalled for a period of time.