Patents by Inventor Floyd Kendrick

Floyd Kendrick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Iterative prediction of circuit delays
    Patent number: 6457160
    Abstract: Provided is a technique for circuit delay prediction in which blocks (preferably, non-overlapping blocks) are specified, each of the blocks including a portion of the circuit. Delay calculation collars (DCCs) are then defined for the blocks, the DCCs including complete dependency information required to calculate delay within the blocks. Next, delay is calculated for the blocks based on the DCCs and delay is calculated for the circuit based on the DCCs. The DCCs are then modified as necessary based on results of either or both of the delay calculation for the blocks or the circuit. The delay calculation and DCC modification steps are then repeated.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: September 24, 2002
    Assignee: LSI Logic Corporation
    Inventors: Stefan Graef, Floyd Kendrick