Patents by Inventor Fong-Ching Huang

Fong-Ching Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8325794
    Abstract: An apparatus and a method for calibrating IQ mismatch to ensure that an in-phase oscillating signal and a quadrature-phase oscillating signal are orthogonal to each other. The apparatus includes a mixer for mixing the in-phase oscillating signal with the quadrature-phase oscillating signal to generate an output signal, a control module for determining a control signal according to a low-frequency component of the output signal, and a phase adjusting module for adjusting the phase of a specific oscillating signal to ensure that the in-phase oscillating signal and the quadrature-phase oscillating signal are orthogonal to each other. The specific oscillating signal may be the in-phase or the quadrature-phase oscillating signal. The apparatus does not require a digital signal-processing unit to perform complex calculations nor requires additional oscillating sources for calibration. Hence, the circuit design is much simplified, and the consumption of system resources is significantly reduced.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: December 4, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Yao Lin, Fong-Ching Huang
  • Patent number: 8204152
    Abstract: A digitally synchronized receiving device and an associated signal processing method are provided. The digitally synchronized receiving device can receive data transmitted by a transmitter. The transmitter and the receiving device belong to a first clock domain and a second clock domain respectively. The receiving device performs synchronization in a digital manner, so as to deal with the problem of the analog solution in prior arts and the synchronization for interference cancellation.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: June 19, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Fong-Ching Huang, Chih-Yung Shih
  • Patent number: 8130879
    Abstract: An apparatus and method for interference cancellation is provided to cancel the interference such as echo and cross-talk received by a receiver of a communication system. The apparatus includes a digital cancellation signal generator, a first canceller, and a second canceller. The digital cancellation signal generator can generate a digital cancellation signal, which includes a first and a second portion and represents an interference signal within a received signal. The first canceller can perform an analog cancellation on the received signal to output a partially-interference-canceled received signal according to the first portion of the digital cancellation signal. The second canceller can perform a digital cancellation on the partially-interference-canceled received signal according to the second portion of the digital cancellation signal.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: March 6, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventor: Fong Ching Huang
  • Publication number: 20100311360
    Abstract: A transmitter includes a predistortion calculation unit, a transmitting circuit, a receiving circuit, an adjusting unit and a parameter generating and storing unit. The predistortion calculation unit is utilized for pre-distorting an input signal to generate a predistorted input signal according to a specific predistortion parameter. The transmitting circuit is utilized for processing the predistorted input signal to generate an output signal. The receiving circuit is utilized for receiving the output signal to generate a received signal. The adjusting unit is utilized for adjusting the received signal to generate an adjusted signal, where the adjusted signal is substantially equal to the input signal. The parameter generating and storing unit is utilized for generating the specific predistortion parameter, and updating at least one stored predistortion parameter according to the input signal and the adjusted signal.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 9, 2010
    Inventors: Fong-Ching Huang, Yuan-Shuo Chang
  • Patent number: 7482956
    Abstract: A calibration device for calibrating an ADC comprising: an error estimator for estimating an error of a digital signal outputted from the ADC, the error estimator includes: a digital filter for filtering the digital signal to generate a filtered signal; and a least-mean-square module for performing a least-mean-square operation according to the filtered signal to generate an estimated error; and an error correction module for correcting the digital signal according to the estimated error.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: January 27, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Fong-Ching Huang, Cheng-Chung Hsu
  • Publication number: 20080267277
    Abstract: A digitally synchronized receiving device and an associated signal processing method are provided. The digitally synchronized receiving device can receive data transmitted by a transmitter. The transmitter and the receiving device belong to a first clock domain and a second clock domain respectively. The receiving device performs synchronization in a digital manner, so as to deal with the problem of the analog solution in prior arts and the synchronization for interference cancellation.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 30, 2008
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Fong-Ching HUANG, Chih-Yung SHIH
  • Publication number: 20080253489
    Abstract: An apparatus and method for interference cancellation is provided to cancel the interference such as echo and cross-talk received by a receiver of a communication system. The apparatus includes a digital cancellation signal generator, a first canceller, and a second canceller. The digital cancellation signal generator can generate a digital cancellation signal, which includes a first and a second portion and represents an interference signal within a received signal. The first canceller can perform an analog cancellation on the received signal to output a partially-interference-canceled received signal according to the first portion of the digital cancellation signal. The second canceller can perform a digital cancellation on the partially-interference-canceled received signal according to the second portion of the digital cancellation signal.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 16, 2008
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Fong Ching HUANG
  • Publication number: 20080024338
    Abstract: A calibration device for calibrating an ADC comprising: an error estimator for estimating an error of a digital signal outputted from the ADC, the error estimator includes: a digital filter for filtering the digital signal to generate a filtered signal; and a least-mean-square module for performing a least-mean-square operation according to the filtered signal to generate an estimated error; and an error correction module for correcting the digital signal according to the estimated error.
    Type: Application
    Filed: February 2, 2007
    Publication date: January 31, 2008
    Inventors: Fong-Ching Huang, Cheng-Chung Hsu
  • Patent number: 7277503
    Abstract: An apparatus and method for synchronizing sampling frequencies of a receiver and a transmitter of a multi-carrier communication system is provided. The receiver includes an estimator for estimating a frequency offset by employing an additional angle rotation of a received signal in frequency domain. The apparatus includes a compensation loop filter for generating a first output in response to a frequency offset compensation, an adder for adding the estimated frequency offset and the first output to generate a second output, and a loop filter for generating frequency offset compensation according to the second output. The method repeatedly applies the apparatus to generate frequency offset compensation, and then feeds it back to an oscillator to compensate the sampling frequency of the receiver. The apparatus and method can also be applied to a communication system with a carrier frequency offset.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: October 2, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventors: Fong-Ching Huang, Der-Zheng Liu
  • Patent number: 7257155
    Abstract: The present invention provides a method for initialization and stepsize control of a time-domain equalizer (TEQ) in a receiver of a multi-carrier communication system to upgrade the performance of adaptive TEQ algorithms. As to TEQ initialization, the Time-domain Window Mask method generates a modified channel impulse response (CIR) by performing a locate maximum energy algorithm and then applies a time-domain window mask to adjust the modified CIR to obtain an initial value of a target impulse response. Then, a dividing operation is performed on the frequency-domain initial target impulse response and the modified CIR to determine an initial value of the frequency-domain TEQ impulse response. The Head-tail Equalizing method also performs the locate maximum energy algorithm, and the remaining points other than the consecutive points with maximum energy are combined and padded zero to the last few points to generate a modified CIR.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: August 14, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Fong-Ching Huang
  • Patent number: 7253762
    Abstract: The present invention provides an apparatus and a method for estimating at least one of timing, gain, and offset errors of a time-interleaved ADC. The apparatus has a first ADC, a second ADC, a converter, an estimator, and a compensator. The converter has a Fourier Transform converter and a calculator.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: August 7, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventors: Fong-Ching Huang, Chao-Cheng Lee
  • Publication number: 20070058754
    Abstract: An apparatus and a method for calibrating IQ mismatch to ensure that an in-phase oscillating signal and a quadrature-phase oscillating signal are orthogonal to each other. The apparatus includes a mixer for mixing the in-phase oscillating signal with the quadrature-phase oscillating signal to generate an output signal, a control module for determining a control signal according to a low-frequency component of the output signal, and a phase adjusting module for adjusting the phase of a specific oscillating signal to ensure that the in-phase oscillating signal and the quadrature-phase oscillating signal are orthogonal to each other. The specific oscillating signal may be the in-phase or the quadrature-phase oscillating signal. The apparatus does not require a digital signal-processing unit to perform complex calculations nor requires additional oscillating sources for calibration. Hence, the circuit design is much simplified, and the consumption of system resources is significantly reduced.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 15, 2007
    Inventors: Ying-Yao Lin, Fong-Ching Huang
  • Publication number: 20060232460
    Abstract: The present invention provides an apparatus and a method for estimating at least one of timing, gain, and offset errors of a time-interleaved ADC. The apparatus has a first ADC, a second ADC, a converter, an estimator, and a compensator. The converter has a Fourier Transform converter and a calculator.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 19, 2006
    Inventors: Fong-Ching Huang, Chao-Cheng Lee
  • Publication number: 20040165674
    Abstract: The present invention provides a method for initialization and stepsize control of a time-domain equalizer (TEQ) in a receiver of a multi-carrier communication system to upgrade the performance of adaptive TEQ algorithms. As to TEQ initialization, the Time-domain Window Mask method generates a modified channel impulse response (CIR) by performing a locate maximum energy algorithm and then applies a time-domain window mask to adjust the modified CIR to obtain an initial value of a target impulse response. Then, a dividing operation is performed on the frequency-domain initial target impulse response and the modified CIR to determine an initial value of the frequency-domain TEQ impulse response. The Head-tail Equalizing method also performs the locate maximum energy algorithm, and the remaining points other than the consecutive points with maximum energy are combined and padded zero to the last few points to generate a modified CIR.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 26, 2004
    Applicant: Realtek Semiconductor Corp.
    Inventor: Fong-Ching Huang
  • Publication number: 20040032854
    Abstract: The present invention provides an apparatus and method for synchronizing sampling frequencies of a receiver and a transmitter of a multi-carrier communication system. The receiver includes an estimator for estimating a frequency offset by employing an additional angle rotation of a received signal in frequency domain. The apparatus includes a compensation loop filter for generating a first output in response to a frequency offset compensation, an adder for adding the estimated frequency offset and the first output to generate a second output, and a loop filter for generating the frequency offset compensation according to the second output. The method repeatedly applies the apparatus to generate the frequency offset compensation, and then feeds it back to an oscillator to compensate the sampling frequency of the receiver. The apparatus and method can also be applied to a communication system with a carrier frequency offset.
    Type: Application
    Filed: August 14, 2003
    Publication date: February 19, 2004
    Applicant: Realtek Semiconductor Corp.
    Inventors: Fong-Ching Huang, Der-Zheng Liu