Patents by Inventor Foo Chung Choong

Foo Chung Choong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8823452
    Abstract: Embodiments provide a gm-ratioed amplifier. The gm-ratioed amplifier comprises a first input voltage terminal and a second input voltage terminal, a first output voltage terminal and a second output voltage terminal, and an amplifying unit. The amplifying unit may be coupled between the input voltage terminals and the output voltage terminals and may be adapted to supply an output voltage to the output terminals in dependence on an input voltage supplied to the input terminals. The amplifying unit may comprise a gm-load, which comprises a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor. A first source/drain terminal and a gate terminal of the first field effect transistor may be coupled to the first output voltage terminal, and a first source/drain terminal and a gate terminal of the second field effect transistor may be coupled to the second output voltage terminal.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: September 2, 2014
    Assignee: Agency for Science, Technology and Research
    Inventors: Zhiming Chen, Foo Chung Choong, Yuanjin Zheng
  • Publication number: 20130207723
    Abstract: Embodiments provide a gm-ratioed amplifier. The gm-ratioed amplifier comprises a first input voltage terminal and a second input voltage terminal, a first output voltage terminal and a second output voltage terminal, and an amplifying unit. The amplifying unit may be coupled between the input voltage terminals and the output voltage terminals and may be adapted to supply an output voltage to the output terminals in dependence on an input voltage supplied to the input terminals. The amplifying unit may comprise a gm-load, which comprises a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor. A first source/drain terminal and a gate terminal of the first field effect transistor may be coupled to the first output voltage terminal, and a first source/drain terminal and a gate terminal of the second field effect transistor may be coupled to the second output voltage terminal.
    Type: Application
    Filed: March 24, 2010
    Publication date: August 15, 2013
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: Zhiming Chen, Foo Chung Choong, Yuanjin Zheng