Patents by Inventor Forrest A. Edwards

Forrest A. Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Architecture providing increased information display for long acquisitions or constrained memory bandwidth
    Patent number: 6847905
    Abstract: A method and apparatus for rasterizing a digital sample stream by producing histograms for each of a plurality of time slices forming a display frame. Time slice histograms for at least one display frame are stored in a circular memory buffer and provided to a display raster for display. The first time slice displayed optionally comprises that time slice temporally associated with a trigger condition.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: January 25, 2005
    Assignee: Tektronix, Inc.
    Inventors: Eric P. Etheridge, Kevin T. Ivers, Forrest A. Edwards, Paul M. Gerlach
  • Architecture providing increased information display for long acquisitions or constrained memory bandwidth
    Publication number: 20040008160
    Abstract: A method and apparatus for rasterizing a digital sample stream by producing histograms for each of a plurality of time slices forming a display frame. Time slice histograms for at least one display frame are stored in a circular memory buffer and provided to a display raster for display. The first time slice displayed optionally comprises that time slice temporally associated with a trigger condition.
    Type: Application
    Filed: February 12, 2003
    Publication date: January 15, 2004
    Inventors: Eric P. Etheridge, Kevin T. Ivers, Forrest A. Edwards, Paul M. Gerlach
  • Dithering apparatus to properly represent aliased signals for high speed signal sampling
    Patent number: 6388595
    Abstract: The subject invention addresses the problem of aliasing in subsampled data by adding dither to the timing of the subsampling of the data. The subject invention solves a speed problem caused by delays in modifying (i.e., dithering) the A/D converter sampling clock. It is herein recognized that to maintain a high acquisition rate one should randomly select (i.e., dither) samples after demultiplexing the data into a wider and slower stream of samples, rather than attempting to modify the high speed A/D converter sampling clock.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: May 14, 2002
    Assignee: Tektronix, Inc.
    Inventors: Forrest A. Edwards, Eric P. Etheridge
  • Test signal generator
    Patent number: D352251
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: November 8, 1994
    Assignee: Tektronix, Inc.
    Inventors: Scott R. Ketterer, Peter D. Rosback, John W. Edwards, Forrest A. Edwards