Abstract: An improved arbitration system is disclosed for arbitrating signals at a plurality of input nodes to output nodes where each input node can access any output node. The system includes a FIFO (first-in-first-out) input queue for each node and means for arbitrating the top of each queue for providing the arbitrated output to a given node and means when the top of the input queue has no request for a given node arbitrating the requests from the next to the top entry of the input queues and providing the data from the next to top entry associated with the arbitrated request to the given node.

Abstract: Dynamic address translation structures and procedures are capable of multiple address translations for the same processor in a single cycle. According to one approach, a plurality of directory look aside tables (DLATs) are used to provide multiple address translation. The DLATs are accessed in parallel by separate virtual address generators. To avoid the problem of generating the same address multiple times for each of the DLATs, a generated address for one DLAT may be written to all the DLATs or, alternatively, if a miss occurs in one DLAT, a search is made of the other DLATs before the address is generated. In the former case, an address written to all the DLATs may overwrite an address that will be needed for a future translation by one of the other DLATs. This is avoided in the latter case, but translations in other DLATs are interrupted when a miss occurs in one of the DLATs. This, in turn, may be avoided by employing "shadow" DLATs which are copies of the DLATs.